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8101 Datasheet(PDF) 94 Page - LSI Computer Systems |
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8101 Datasheet(HTML) 94 Page - LSI Computer Systems |
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94 / 172 page ![]() 4-6 Registers Copyright © 2000–2001 by LSI Logic Corporation. All rights reserved. 116–119 0b01110100– 0b01110111 Reserved 120–123 0b01111000– 0b01111011 Counter Half Full Mask 1–4 4.3.24 124–127 0b01111100– 0b01111111 Reserved 128–129 0b10000000– 0b10000001 Counter 1- etherStatsDropEvents 4.3.25 130–131 0b10000010– 0b10000011 Counter 2 - etherStatsOctets 4.3.25 132–133 0b10000100– 0b10000101 Counter 3 - etherStatsPkts 4.3.25 134–135 0b10000110– 0b10000111 Counter 4 - etherStatsBroadcastPkts 4.3.25 136–137 0b10001000– 0b10001001 Counter 5 - etherStatsMulticastPkts 4.3.25 138–139 0b10001010– 0b10001011 Counter 6 - etherStatsCRCAlignErrors 4.3.25 140–141 0b10001100– 0b10001101 Counter 7 - etherStatsUndersizePkts 4.3.25 142–143 0b10001110– 0b10001111 Counter 8 - etherStatsOversizePkts 4.3.25 144–145 0b10010000– 0b10010001 Counter 9 - etherStatsFragments 4.3.25 146–147 0b10010010– 0b10010011 Counter 10 - etherStatsJabber 4.3.25 148–149 0b10010100– 0b10010101 Counter 11 - etherStatsCollisions 4.3.25 15 0–151 0b10010110– 0b10010111 Counter 12 - etherStatsPkts64Octets 4.3.25 Table 4.2 Register Addresses (Cont.) Register Numbers Register Address (REGAD[7:0] Pins) Register Name Paragraph Number |
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