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8101 Datasheet(PDF) 74 Page - LSI Computer Systems |
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8101 Datasheet(HTML) 74 Page - LSI Computer Systems |
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74 / 172 page ![]() 2-56 Functional Description Copyright © 2000–2001 by LSI Logic Corporation. All rights reserved. a. Bad RX packet = legal-length error, CRC error, receive FIFO overflow, symbol error. Where: CRC Error is bad FCS with an integral number of octets. Alignment Error is bad FCS with nonintegral number of octets. Symbol Error is an invalid codeword or a /V/. b. Bad TX packet = legal-length error, transmit FIFO underflow. c. Legal-length packet is between 64 and Max_Packet_Length in bytes. Preamble is not included in length count. d. Max_Packet_Length for the counters can be programmed to be either 1518, 1522, 1535, or unlimited bytes. 1518 is the default for both transmit and receive. e. The counter result is stored in two 16-bit registers. Thus, there are two register addresses for each counter. Of the two registers for a given counter, the register with the lower value address contains the least significant counter bits. f. The RMON specs explicitly states that packet and octet counters should only tabulate received information. This is sometimes interpreted to mean both transmitted and received information because Ethernet was originally a shared media. As such, transmit packet and octet counters are also available in counters 18–27 and can be summed with receive packet and octet counts if desired. 49 aSQETestErrors RX Number of times SQE was asserted. Equivalent to "dot3StatsSQETestError" 32 Use Ctr. #40 50 aSymbolErrorDuringCarrier RX One or more symbol errors received from a PHY during packet reception, exclusive of collision. This counter is only incremented once per packet, regardless of the number of symbol errors in that packet. 32 0b11100010 0b11100011 aMACControlFramesTransmitted TX Valid MAC Control packets. Equivalent to "apauseMACCtrlFramesTransmitted" Use Ctr. #52 aMACControlFramesReceived RX Valid MAC Control packets. Equivalent to "apauseMACCtrlFramesReceived" Use Ctr. #53 51 aUnsupportedOpcodesReceived RX Valid MAC Control packets with non-pause opcode. 32 0b11100100 0b11100101 52 apauseMACCtrlFramesTransmitted TX Valid MAC Control packets with pause opcode. 32 0b11100110 0b11100111 53 apauseMACCtrlFramesReceived RX Valid MAC Control packets with pause opcode. 32 0b11101000 0b11101001 1. Footnotes Table 2.14 Counter Definition (Cont.) Counter Number Counter Name (MIB Object Name) Counter Description RX/TX Definition Size (Bits) Register Address REGAD[7:0] (Low/High) |
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