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8101 Datasheet(PDF) 68 Page - LSI Computer Systems |
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8101 Datasheet(HTML) 68 Page - LSI Computer Systems |
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68 / 172 page ![]() 2-50 Functional Description Copyright © 2000–2001 by LSI Logic Corporation. All rights reserved. 11 etherStatsCollisions TX/ RX CRS asserted and one or more collsions occurred. Since controller is Full Duplex only, this counter is undefined. 32 0b10010100 0b10010101 12 etherStatsPkts64Octets RX Packets of length = 64 bytes, good or bad.1 32 0b10010110 0b10010111 13 etherStatsPkts65to127Octets RX Packets of length between 65–127 bytes, inclusive, good or bad.1 32 0b10011000 0b10011001 14 etherStatsPkts128to255Octets RX Packets of length between 128–255 bytes, inclusive, good or bad.1 32 0b10011010 0b10011011 15 etherStatsPkts256to511Octets RX Packets of length between 256–511 bytes, inclusive, good or bad.1 32 0b10011100 0b10011101 16 etherStatsPkts512to1023Octets RX Packets of length between 512–1023 bytes, inclusive, good or bad.1 32 0b10011110 0b10011111 17 etherStatsPkts1024to1518Octets RX Packets of length between 1024 and Max_Packet_Length, inclusive, or bad.1 32 0b10100000 0b10100001 18 etherStatsOctets_TX TX Bytes, exclusive of preamble, in good or bad packets.1 32 0b10100010 0b10100011 19 etherStatsPkts_TX TX All packets, good or bad.1 32 0b10100100 0b10100101 20 etherStatsBroadcastPkts_TX TX Broadcast packets, good only.1 32 0b10100110 0b10100111 21 etherStatsMulticastPkts_TX TX Multicast packets, good only.1 32 0b10101000 0b10101001 22 etherStatsPkts64Octets_TX TX Packets of length = 64 bytes, good or bad.1 32 0b10101010 0b10101011 23 etherStatsPkts65to127Octets_TX TX Packets of length between 65–127 bytes, inclusive, good or bad.1 32 0b10101100 0b10101101 24 etherStatsPkts128to255Octets_TX TX Packets of length between 128–255, inclusive, good or bad.1 32 0b10101110 0b10101111 25 etherStatsPkts256to511Octets_TX TX Packets of length between 256–511 bytes, inclusive, good or bad.1 32 0b10110000 0b10110001 Table 2.14 Counter Definition (Cont.) Counter Number Counter Name (MIB Object Name) Counter Description RX/TX Definition Size (Bits) Register Address REGAD[7:0] (Low/High) |
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