8101 datasheet(64/172 Pages) LSI

64 / 172 page

2-46

Functional Description

2.17.4 Reserved Multicast Address Disable

Receive pause frames are normally rejected as invalid if they do not have

the reserved multicast address in the destination address ﬁeld. Setting

the MCFLTR bit in “Register 19–Flow Control 1‚" Section 4.3.16,

programs the controller to accept receive pause frames regardless of the

contents in the destination address ﬁeld. When this bit is cleared, any

value in the destination address ﬁeld is accepted as a valid address.

2.17.5 MAC Control Frame AutoSend

The level of data in the receive FIFO also triggers the transmission of

autogenerated pause frames. This feature is referred to as MAC control

frame AutoSend. Appropriately setting the MCASEND[3:0] bits in

“Register 19–Flow Control 1‚" Section 4.3.16, enable the AutoSend

feature. When MAC control frame AutoSend is enabled, autogenerated

pause frames are transmitted when the receive FIFO data exceeds a

programmable threshold level called the MAC control AutoSend

threshold. The MAC control AutoSend threshold can be set with the four

MACSEND bits in “Register 19–Flow Control 1‚" Section 4.3.16. The

automatic pause frame generation mechanism is described in more

detail in Section 2.17.1, “Automatic Pause Frame Generation”.

2.18 Reset

The controller has four resets which are described in Table 2.13. The

controller should be ready for normal operation 1

µs after the reset

sequence has been completed for that bit.

8101 Datasheet(PDF) 64 Page - LSI Computer Systems