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8101 Datasheet(PDF) 63 Page - LSI Computer Systems |
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8101 Datasheet(HTML) 63 Page - LSI Computer Systems |
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63 / 172 page ![]() MAC Control Frames 2-45 Copyright © 2000–2001 by LSI Logic Corporation. All rights reserved. Figure 2.7 Autogenerated Pause Frame Format Notes: [1] < > Means 10B encoded [2] /I1/ or /I2/, depends on running disparity A[0:7]REG2 A[8:15]REG2 A[16:23]REG1 A[24:31]REG1 A[32:39]REG0 A[40:47]REG0 MAC 10-Bit PHY 10101010 10101010 10101010 10101010 10101010 10101010 10101010 10101011 PRE SFD DA SA L/T PARAM FCS[31:24] FCS[23:16] FCS[15:8] FCS[7:0] Interface /I2/ /I2/ /S/ D21.2 D21.2 D21.2 D21.2 D21.2 D21.2 D21.6 [1] <A[0:7]REG2> <A[8:15]REG2> <A[16:23]REG1> <A[24:31]REG1> <A[32:39]REG0> <A[40:47]REG0> D8.4 D8.0 <FCS[31:24]> <FCS[23:16]> <FCS[15:8]> <FCS[7:0]> /T/ /R/ /I1/ or /I2/ /I2/ /I2/ a b c d e f g h i j [2] MSB LSB TX[0] RX[0] TX[9] RX[9] 10-Bit PHY Interface PCS 10B PCS 8B Bits Transmitted Bytes Transmitted 10000000 00000001 01000011 00000000 00000000 10000000 D1.0 D0.4 D2.6 D0.0 D0.0 D1.0 00010001 00010000 00000000 10000000 OP P[8:15]REG20 P[0:7]REG20 00000000 00000000 PAD FCS (42 Bytes) DATA A B C D E F G H D0.0 D1.0 <P[8:15]REG20> <P[0:7]REG20> D0.0 D0.0 |
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