 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
8101 Datasheet(PDF) 103 Page - LSI Computer Systems |
|
|
|||||||||||||||||||||||||||||
8101 Datasheet(HTML) 103 Page - LSI Computer Systems |
|
|
103 / 172 page  Register Definitions 4-15 Copyright © 2000–2001 by LSI Logic Corporation. All rights reserved. 4.3.8 Register 7–Configuration 1 Note: RST 15-bit occurs on the REGD15 pin RST Reset 15, R/WSC RXRST Receive Reset 14, R/WSC TXRST Transmit Reset 13, R/WSC ANRST AutoNegotiation Restart 12, R/WSC CTRRST Counter Reset 11, R/WSC 15 14 13 12 11 10 9 8 RST RXRST TXRST ANRST CTRRST APAD IPG[2:1] 76543210 IPG[0] TXPRMBL TXCRC RXPRMBL RXCRC STSWRD1 STSWRD0 PEOF RST Description 1 Controller is reset; it self-clears in 1 µs 0 Nominal operation RXRST Description 1 Receive data path reset, self-clears when the start of the new packet is detected 0 Normal TXRST Description 1 Transmit data, data reset, self-clearing in 1 µs 0 Normal ANRST Description 1 AutoNegotiation algorithm restarted, self-clearing after AutoNegotiation process starts 0 No Reset CTRRST Description 1 All counters reset to 0, self-clearing in 1 µs 0 No reset |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
