FS5502 datasheet(106/113 Pages) NXP

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NXP Semiconductors

FS5502

High voltage PMIC with multiple SMPS and LDO

33 Revision history

Document ID

Release date

Data sheet status

Change notice

Supersedes

FS5502 v.4.0

20211027

Product data sheet

CIN 202110030I

FS5502 v.3.0

Modifications

• Table 1: added MC33FS5502Y0KS and MC33FS5502Y3KS parts and OTP links

• Table 48: updated bit position of FS_DIG_REF_OV and FS_OSC_DRIFT bits

• Table 60: updated description for OTP_CFG_UVOV_3 register

• Table 64: updated VBUCK1_SOFT_START description

• Table 65: updated description for TBUCK3_SOFT_START (1.8 V replaced by 1.1 V)

• Section 16.5: updated Figure 21

• Table 79: updated table to include step-cut and wettable flank values

• Section 29: added drawings of dimple wettable flank type package for MC33FS5502xxKS

• Section 30: updated Dimple wettable flank type package information

FS5502 v.3.0

2020127

Product data sheet

201912015I

FS5502 v.2.1

Modifications

• Global: multiple formatting and wording updates, deleted "SPI" references

• Global: changed data sheet status from Preliminary to Product

• Section 5: replaced PC part by MC and added MC33FS5502Y3ES

• Table 2: updated ground pin description

• Table 78: added values for BUCKx_SW and updated min value for DC voltage (replaced −1.0 by −0.3)

• Section 12.1: updated values in Table 57

• Table 79: updated TA and TJ description (added "Grade1")

• Figure 7: corrected typo (replaced WAKE1 by WAKE1/2)

• Table 4: updated TDBG values and unit

• Table 21: updated reset value for Bit 22 and Bit 23 (replaced 0 by 1)

• Table 49: updated reset value for Bit 17 and Bit 22 (replaced 0 by 1)

• Table 57: corrected typo (replaced "OTP_CFG_BUCK2_1" by "OTP_CFG_BUCK1_3 and "OTP_CFG_BUCK2_2" by

"OTP_CFG_BUCK1_4"

• Table 59: updated OTP_CFG_BUCK1_2 register description (replaced 2.6 A by Reserved)

• Table 59: updated OTP_CFG_CLOCK_4 register description

• Section 14.1: updated description (first paragraph)

• Section 14.3: updated calculation method

• Section 18.5: updated description

• Section 14.5: updated description and values in Table 63

• Section 23: updated assumptions and description (replaced "VFPRE_SW" by "FPRE_SW")

• Table 91: updated min and max values for RSTBILIM (replaced 6.0 by 4.0 and 22 by 20)

• Section 8.4: updated description and corrected typo in Figure 5

• Section 8.5: updated TDBG description

• Section 20.3: enhanced description (added Figure 28 and Table 76)

• Section 22.2: updated description for charged device model

• Section 30.3, Section 30.4: updated description

• Table 59: updated OTP description

• Table 60: updated OTP_CFG_UVOV_3 register description

• Table 61, Table 62, Table 64, Table 65: updated parameters

• Section 14.6: updated Figure 13

• Table 13: updated reset value for Bit 12 and Bit 11 (replaced OTP by 1)

• Section 10.16: updated read and rest values and register bit description

• Table 90: updated min and max values for PGOODILIM

• Section 9: corrected typo (deleted R/W SPI column)

FS5502 v.2.1

20190521

Preliminary data sheet

—

FS5502 v.2

Table 93. Revision history

FS5502

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 4 — 27 October 2021

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