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TMS320F Datasheet(PDF) 379 Page - Texas Instruments

Part # TMS320F
Description  CPU and Instruction Set
PDF  389 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320F Datasheet(HTML) 379 Page - Texas Instruments

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Index
Index-2
accumulator instructions
(continued)
subtract conditionally from accumulator
(SUBC)
7-179
subtract PREG from accumulator (SPAC)
7-159
subtract PREG from accumulator and load TREG
(LTS)
7-99
subtract PREG from accumulator and multiply
(MPYS)
7-117
subtract PREG from accumulator and square
specified value (SQRS)
7-169
subtract value and logical inversion of carry bit
from accumulator (SUBB)
7-177
subtract value from accumulator (SUB)
7-173
subtract value from accumulator with shift
specified by TREG (SUBT)
7-183
subtract value from accumulator with sign
extension suppressed (SUBS)
7-181
XOR accumulator with data value (XOR)
7-192
ADD instruction
7-22
ADDC instruction
7-26
address generation
data memory
direct addressing
6-4
immediate addressing
6-2
indirect addressing
6-9
program memory
5-2
hardware
5-3
address map, data memory, data page 0
3-7
addressing, bit-reversed indexed
6-10, D-2
addressing modes
definition
D-1
direct
description
6-4
examples
6-6
figure
6-5
opcode format
6-5 to 6-7
role of data page pointer (DP)
6-4
immediate
6-2
indirect
description
6-9
effects on auxiliary register pointer
(ARP)
6-13 to 6-15
effects on current auxiliary register
6-13 to
6-15
examples
6-14
modifying auxiliary register content
6-16
opcode format
6-12 to 6-14
operands
6-9
addressing modes, indirect
(continued)
operation types
6-13 to 6-15
options
6-9
possible opcodes
6-13 to 6-15
overview
6-1
ADDS instruction
7-28
ADDT instruction
7-30
ADRK instruction
7-32
AND instruction
7-33
APAC instruction
7-36
ARAU (auxiliary register arithmetic unit)
2-9, 4-12
ARAU and related logic, block diagram
4-12
ARB (auxiliary register pointer buffer)
4-16
architecture, internal memory
2-5 to 2-7
arithmetic logic unit, central (CALU)
4-9
ARP (auxiliary register pointer)
4-16
auxiliary register arithmetic unit (ARAU),
description
4-12
auxiliary register functions
4-14
auxiliary register instructions
add short immediate value to current auxiliary
register (ADRK)
7-32
branch if current auxiliary register not zero
(BANZ)
7-40
compare current auxiliary register with AR0
(CMPR)
7-64
load specified auxiliary register (LAR)
7-79
modify auxiliary register pointer (MAR)
7-110
modify current auxiliary register (MAR)
7-110
store specified auxiliary register (SAR)
7-151
subtract short immediate value from current
auxiliary register (SBRK)
7-153
auxiliary register pointer (ARP)
4-16, D-2
auxiliary register pointer buffer (ARB)
4-16, D-2
auxiliary register update (ARU) code
6-12
auxiliary registers
2-9
auxiliary registers (AR0–AR7)
block diagram
4-12
current auxiliary register
6-9
role in indirect addressing
6-9 to 6-16
update code (ARU)
6-12
description
4-12 to 4-14
general uses for
4-14
instructions that modify content
6-16
next auxiliary register
6-11
used in indirect addressing
4-12



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