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TMS320F Datasheet(PDF) 383 Page - Texas Instruments |
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TMS320F Datasheet(HTML) 383 Page - Texas Instruments |
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383 / 389 page ![]() Index Index-6 indirect addressing (continued) effects on current auxiliary register 6-13 to 6-15 examples 6-14 modifying auxiliary register content 6-16 opcode format 6-12 to 6-14 operands 6-10 operation types 6-13 to 6-15 options 6-9 possible opcodes 6-13 to 6-15 input scaling section of CPU 4-3 input shifter 2-8, 4-3 input/output (I/O) space 3-2 instruction register (IR), definition D-7 instructions 7-1 to 7-19 Boolean logic AND 7-33 CMPL (complement/NOT) 7-63 OR 7-128 XOR (exclusive OR) 7-192 compared with those of other TMS320 devices A-1 to A-36 conditional 5-10 to 5-13 branch (BCND) 7-42 call (CC) 7-59 conditions that may be tested 5-10 return (RETC) 7-142 stabilization of conditions 5-11 using multiple conditions 5-10 CPU halt until hardware interrupt (IDLE) 7-67 delay/no operation (NOP) 7-124 descriptions 7-19 how to use 7-12 enhanced A-5 idle until hardware interrupt (IDLE) 7-67 interrupt branch to NMI interrupt vector location (NMI) 7-123 branch to specified interrupt vector location (INTR) 7-70 branch to TRAP interrupt vector location (TRAP) 7-191 negate accumulator (NEG) 7-121 no operation (NOP) 7-124 normalize (NORM) 7-125 OR 7-128 power down until hardware interrupt (IDLE) 7-67 repeat next instruction n times description (RPT) 7-145 introduction 5-14 instructions (continued) stack pop top of stack to data memory (POPD) 7-136 pop top of stack to low accumulator bits (POP) 7-134 push data memory value onto stack (PSHD) 7-138 push low accumulator bits onto stack (PUSH) 7-140 status registers ST0 and ST1 clear control bit (CLRC) 7-61 load (LST) 7-86 load data page pointer (LDP) 7-82 modify auxiliary register pointer (MAR) 7-110 set control bit (SETC) 7-154 set product shift mode (SPM) 7-166 store (SST) 7-171 summary 7-2 to 7-11 test bit specified by TREG (BITT) 7-46 test specified bit (BIT) 7-44 INT1 interrupt priority 5-15 vector location 5-15 INT10 interrupt, vector location 5-16 INT11 interrupt, vector location 5-16 INT12 interrupt, vector location 5-16 INT13 interrupt, vector location 5-16 INT14 interrupt, vector location 5-16 INT15 interrupt, vector location 5-16 INT16 interrupt, vector location 5-16 INT2 interrupt priority 5-15 vector location 5-15 INT20 interrupt, vector location 5-16 INT21 interrupt, vector location 5-16 INT22 interrupt, vector location 5-16 INT23 interrupt, vector location 5-16 INT24 interrupt, vector location 5-16 INT25 interrupt, vector location 5-16 INT26 interrupt, vector location 5-16 INT27 interrupt, vector location 5-16 INT28 interrupt, vector location 5-16 INT29 interrupt, vector location 5-16 INT3 interrupt priority 5-15 vector location 5-15 INT30 interrupt, vector location 5-16 |
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