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RC522 Datasheet(PDF) 106 Page - NXP Semiconductors |
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RC522 Datasheet(HTML) 106 Page - NXP Semiconductors |
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106 / 109 page ![]() 112132 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 3.2 — 22 May 2007 106 of 109 continued >> NXP Semiconductors MFRC522 Contactless Reader IC 34. Figures Fig 1. Simplified MFRC522 Block diagram . . . . . . . 5 Fig 2. MFRC522 Block diagram . . . . . . . . . . . . . . . 6 Fig 3. Pinning configuration HVQFN32 (SOT617-1). 7 Fig 4. MFRC522 Reader/Writer mode. . . . . . . . . . . 9 Fig 5. ISO/IEC 14443A/MIFARE® Reader/Writer mode communication diagram. . . . . . . . . . . . 9 Fig 6. Data Coding and framing according to ISO/IEC 14443A.. . . . . . . . . . . . . . . . . . . . . 10 Fig 7. Connection to host with SPI . . . . . . . . . . . . 47 Fig 8. Connection to m-Controllers with UART.. . . 48 Fig 9. Schematic Diagram to Read Data. . . . . . . . 50 Fig 10. Schematic Diagram to Write Data. . . . . . . . 51 Fig 11. I2C interface. . . . . . . . . . . . . . . . . . . . . . . . . 52 Fig 12. Bit transfer on the I2C-bus. . . . . . . . . . . . . . 53 Fig 13. START and STOP conditions. . . . . . . . . . . . 53 Fig 14. Acknowledge on the I2C- bus. . . . . . . . . . . 54 Fig 15. Data transfer on the I2C- bus. . . . . . . . . . . . 55 Fig 16. First byte following the START procedure. . 56 Fig 17. Register Read and Write Access . . . . . . . . 57 Fig 18. I2C HS mode protocol switch . . . . . . . . . . . 58 Fig 19. I2C HS mode protocol frame. . . . . . . . . . . . 59 Fig 20. Serial data switch for TX1 and TX2. . . . . . . 63 Fig 21. Overview MFIN/MFOUT Signal Routing . . . 64 Fig 22. Ouartz Connection . . . . . . . . . . . . . . . . . . . 69 Fig 23. Oscillator Startup time. . . . . . . . . . . . . . . . . 71 Fig 24. Output TestDAC 1 on AUX1 and TestDAC 2 on AUX2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Fig 25. Output Testsignal Corr1 on AUX1 and MinLevel on AUX2. . . . . . . . . . . . . . . . . . . . 80 Fig 26. Output ADC channel I on AUX 1 and ADC channel Q on AUX 2. . . . . . . . . . . . . . . . . . 80 Fig 27. Output RxActive on AUX 1 and TxActive on AUX 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 Fig 28. Output Rx data stream on AUX 1 and AUX 2. 82 Fig 29. RX Input Voltage Range . . . . . . . . . . . . . . . 88 Fig 30. Timing Diagram for SPI. . . . . . . . . . . . . . . . 90 Fig 31. Timing for F/S mode devices on the I2C-bus. . 91 Fig 32. Typical Application Circuit Diagram. . . . . . . 92 Fig 33. Package outline package version (HVQFN32) 93 Fig 34. Packing Information 1 Tray . . . . . . . . . . . . . 95 Fig 35. Packing Information 5Tray . . . . . . . . . . . . . 96 |
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