SH7727 datasheet(132/1109 Pages) RENESAS

132 / 1109 page

Section 2 CPU

Rev. 5.00 Dec 12, 2005 page 60 of 1034

REJ09B0254-0500

Table 2.16 Single Data Transfer Instruction Formats

Type

Mnemonic

15 14 13 12 11 10 987

6543

210

Single

MOVS.W @-As,Ds

1110

Ds 0:(*)

000

data

MOVS.W @As,Ds

0:R4

1:(*)0

transfer

MOVS.W @As+,Ds

1:R5

2:(*)1

MOVS.W @As+Is,Ds

2:R2

3:(*)1

MOVS.W Ds,@-As

3:R3

4:(*)

001

MOVS.W Ds,@As

5:A1

MOVS.W Ds,@As+

6:(*)1

MOVS.W Ds,@As+Is

7:A0

MOVS.L @-As,Ds

8:X0

MOVS.L @As,Ds

9:X1

MOVS.L @As+,Ds

A:Y0

MOVS.L @As+Is,Ds

B:Y1

MOVS.L Ds,@-As

C:M0

MOVS.L Ds,@As

D:A1G

MOVS.L Ds,@As+

E:M1

MOVS.L Ds,@As+Is

F:A0G

Note: * Codes reserved for system use.

Parallel Processing Instructions: Parallel processing instructions are provided for efficient

execution of digital signal processing using the DSP unit. They are 32 bits long and allow four

simultaneous processes, an ALU operation, multiplication, and two data transfers.

Parallel processing instructions are divided into an A field and a B field. The A field defines data

transfer instructions and the B field an ALU operation instruction and multiply instruction. These

instructions can be defined independently, and the processing is executed in parallel,

independently and simultaneously. A-field parallel data transfer instructions are shown in table

2.17, and B-field ALU operation instructions and multiply instructions in table 2.18.

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