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SH7727 Datasheet(PDF) 129 Page - Renesas Technology Corp |
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SH7727 Datasheet(HTML) 129 Page - Renesas Technology Corp |
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129 / 1109 page ![]() Section 2 CPU Rev. 5.00 Dec 12, 2005 page 57 of 1034 REJ09B0254-0500 Instruction Format Source Operand Destination Operand Sample Instruction dddddddd : GBR indirect with displacement R0 (register direct) MOV.L @@(disp,GBR),R0 R0 (register direct) dddddddd : GBR indirect with displacement MOV.L @R0,@(disp,GBR) dddddddd : PC-relative with displacement R0 (register direct) MOVA @(disp,PC),R0 d type dddd xxxx 15 0 xxxx dddd dddddddd : PC-relative —BF label d12 type dddd xxxx 15 0 dddd dddd dddddddddddd : PC-relative —BRA label (label=disp+PC) nd8 type dddd nnnn xxxx 15 0 dddd dddddddd : PC-relative with displacement nnnn : register direct MOV.L @(disp,PC),Rn iiiiiiii : immediate Indexed GBR indirect AND.B #imm,@(R0,GBR) iiiiiiii : immediate R0 (register direct) AND #imm,R0 i type i i i i xxxx 15 0 xxxx i i i i iiiiiiii : immediate — TRAPA #imm ni type nnnn i i i i xxxx 15 0 i i i i iiiiiiii : immediate nnnn : register direct ADD #imm,Rn Note: * In multiply-and-accumulate instructions, nnnn is the source register. |
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