HD6433713 datasheet(234/324 Pages) RENESAS

234 / 324 page

13.5 Typical Use

An example of how the A/D converter can be used is given below, using channel 1 (AN1) as the

analog input channel. Figure 13-3 shows the operation timing for this example.

Bits AMR2 to AMR0 of the A/D mode register (AMR) are set to 001, and bits AN7 to AN0

of port mode register 0 (PMR0) are set to 00000010, making AN1 the analog input channel.

Interrupt request is cleared by setting bit IRRAD to 0, A/D interrupts are enabled by setting

bit IENAD to 1, and A/D conversion is started by setting bit ADSF to 1.

When A/D conversion is complete, bit IRRAD is set to 1, and the A/D conversion results are

sent to the A/D result register (ADRR). At the same time ADSF is cleared to 0, and the A/D

converter goes to the idle state.

Bit IENAD = 1, so an A/D conversion end interrupt is requested.

The A/D interrupt handling routine starts.

The A/D conversion result is read and processed.

The A/D interrupt handling routine ends.

If ADSF is set to 1 again afterward, A/D conversion starts and steps 2 through 6 take place.

Figures 13-4 and 13-5 show flow charts of procedures for using the A/D converter.

223

HD6433713 Datasheet(PDF) 234 Page - Renesas Technology Corp