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7630 Datasheet(PDF) 120 Page - Renesas Technology Corp |
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7630 Datasheet(HTML) 120 Page - Renesas Technology Corp |
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120 / 238 page ![]() 7630 Group User’s Manual 2-54 $33/,&$7,21 2.4 Controller Area Network (CAN) module 2.4.7 Acceptance filtering The module contains a hardware filtering circuit to screen out the useless messages out of the message stream and thereby reduce CPU load. This filter probes the identifier field of any frame on the bus and decides which frames are relevant to the given node and which may be abandoned. (1) Register structure The hardware implements a single condition identifier filter by a set of acceptance code CACi (Figures 2.4.6 to 2.4.10) and acceptance mask CAMi (Figures 2.4.11 to 2.4.15) registers. These registers cover the entire 29-bit identifier scale (extended format); however 11-bit identifiers (standard format) can be handled as well. The registers (shown in Figure 2.4.30) can be modified in configuration mode (refer to section 2.4.5) only. Fig. 2.4.30 Structure of acceptance mask/code registers (2) Operation Acceptance filtering starts after detecting the start-of-frame of a CAN message. The content of the accept- ance mask registers define which identifier bits have to be subjected to comparison with the corresponding bits of the acceptance code registers. If the acceptance filter judges an incoming frame relevant, the frame is—depending on the availability of a receive buffer—either stored in a receive buffer or a CAN overrun interrupt (COVR) is issued by setting the corresponding interrupt request bit. For further details on the receive buffer system and the overrun interrupt refer to sections 2.4.8 and 2.4.11. (3) Schematic of acceptance filter The acceptance filter mechanism (see Figure 2.4.31) comprises one gate which compares the acceptance code register bit with the corresponding identifier bit of the frame being received, and one gate which tests the relevance of this bit for the acceptance filter process. When all acceptance bits are true, the module rates the frame relevant and attempts to store it to a receive buffer. Address 7 0 CSID10 CSID9 CSID8 CSID7 CSID6 CSID5 CSID4 CSID3 CSID2 CSID1 CSID0 CEID17 CEID16 CEID15 CEID14 CEID13 CEID12 CEID11 CEID10 CEID9 CEID8 CEID7 CEID6 CEID5 CEID4 CEID3 CEID2 CEID1 CEID0 7 0 MSID10 MSID9 MSID8 MSID7 MSID6 MSID5 MSID4 MSID3 MSID2 MSID1 MSID0 MEID17 MEID16 MEID15 MEID14 MEID13 MEID12 MEID11 MEID10 MEID9 MEID8 MEID7 MEID6 MEID5 MEID4 MEID3 MEID2 MEID1 MEID0 003316 003416 003516 003616 003716 003816 003916 003A16 003B16 003C16 Acceptance code registers: Acceptance mask registers: Select the bit pattern of identifiers which should pass acceptance filtering. 0 : Mask identifier bit 1 : Compare identifier bit with acceptance code register bit Shaded bits of CAMi must be cleared. name CAC0 CAC1 CAC2 CAC3 CAC4 CAM0 CAM1 CAM2 CAM3 CAM4 |
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