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HC210 Datasheet(PDF) 110 Page - Altera Corporation

Part # HC210
Description  HardCopy II Device Family
PDF  228 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

HC210 Datasheet(HTML) 110 Page - Altera Corporation

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5–18
Altera Corporation
September 2008
HardCopy Series Handbook, Volume 1
the floorplan. You must adjust the size and location of the LogicLock
Regions you created in the HardCopy II device before compiling the
design.
f
For information about using LogicLock Regions, refer to the Quartus II
Analyzing and Optimizing Design Floorplan chapter in volume 2 of the
Quartus II Handbook.
PowerPlay Power Analyzer
You can perform power estimation and analysis of your HardCopy II and
Stratix II devices using the PowerPlay Early Power Estimator. Use the
PowerPlay Power Analyzer for more accurate estimation of your device’s
power consumption. The PowerPlay Early Power Estimator is available
in the Quartus II software version 5.1 and later. The PowerPlay Power
Analyzer supports HardCopy II devices in version 6.0 and later of the
Quartus II software.
f
For more information about using the PowerPlay Power Analyzer, refer
to the Quartus II PowerPlay Power Analysis chapter in volume 3 of the
Quartus II Handbook on the Altera website at www.altera.com.
Incremental Compilation
The use of the Quartus II Incremental Compilation in the Stratix II FPGA
is supported when migrating a design to a HardCopy II device.
Incremental compilation is supported in the Stratix II First design flow or
HardCopy II First design flow.
To take advantage of Quartus II Incremental Compilation, organize your
design into logical and physical partitions for synthesis and fitting (or
place-and-route). Incremental compilation preserves the compilation
results and performance of unchanged partitions in your design. This
feature dramatically reduces your design iteration time by focusing new
compilations only on changed design partitions. New compilation results
are then merged with the previous compilation results from unchanged
design partitions. You can also target optimization techniques, such as
physical synthesis, to specific partitions while leaving other partitions
untouched.
In addition, be aware of the following guidelines:
■
User partitions and synthesis results are migrated to a companion
device.
■
LogicLock regions are suggested for user partitions, but are not
migrated automatically.



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