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HC210 Datasheet(PDF) 207 Page - Altera Corporation |
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HC210 Datasheet(HTML) 207 Page - Altera Corporation |
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207 / 228 page ![]() Altera Corporation 8–19 September 2008 Preliminary On-Chip Termination Table 8–13 lists the HardCopy II HC210 and HC220 output standards that support on-chip series termination without calibration. On-Chip Series Termination with Calibration Stratix II devices support on-chip series termination with calibration in column I/O pins in the top and bottom banks. HC230 and HC240 devices also support on-chip series termination with calibration in column I/O pins in the top and bottom banks, but HC220 and HC210 devices only support this feature on the top I/O banks. Table 8–14 lists available I/O standards on the HardCopy II devices that support calibrated-series termination. Table 8–13. HC210 and HC220 Selectable I/O Drivers with On-Chip Series Termination without Calibration Note (1) I/O Standard Top Column I/O Pins Bottom Column I/O Pins Left Row I/O Pins Right Row I/O Pins 3.3-V LVTTL 25 or 50 Ω 25 or 50 Ω 25 or 50 Ω 25 or 50 Ω 3.3-V LVCMOS 25 or 50 Ω 25 or 50 Ω 25 or 50 Ω 25 or 50 Ω 2.5-V LVTTL 25 or 50 Ω 25 or 50 Ω 25 or 50 Ω 25 or 50 Ω 2.5-V LVCMOS 25 or 50 Ω 25 or 50 Ω 25 or 50 Ω 25 or 50 Ω 1.8-V LVTTL 25 or 50 Ω 50 Ω 50 Ω 50 Ω 1.8-V LVCMOS 25 or 50 Ω 50 Ω 50 Ω 50 Ω 1.5-V LVTTL (3) (2) 1.5-V LVCMOS (3) (2) 2.5-V SSTL class I 50 Ω (2) (2) (2) 2.5-V SSTL class II 25 Ω (2) (2) (2) 1.8-V SSTL class I 50 Ω (2) (2) (2) 1.8-V SSTL class II 25 Ω (2) 1.8-V HSTL class I 50 Ω (2) (2) (2) 1.8-V HSTL class II 25 Ω (2) 1.5-V HSTL class I (3) (2) Notes to Table 8–13: (1) All these numbers are preliminary and pending silicon characterization. (2) HardCopy II HC210 and HC220 devices do not support on-chip series termination with this I/O standard on these pins. (3) Support pending HardCopy II characterization. |
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