82G33 datasheet(168/437 Pages) INTEL

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DRAM Controller Registers (D0:F0)

168

Datasheet

5.2.44

TSS—Thermal Sensor Status

B/D/F/Type:

0/0/0/MCHBAR

Address Offset:

CDAh

Default Value:

00h

Access:

Size:

8 bits

This read only register provides trip point and other status of the thermal sensor. All

bits in this register are reset to their defaults by CL_PWROK.

Bit

Access &

Default

Description

Catastrophic Trip Indicator (CTI):

1 = Internal thermal sensor temperature is above the catastrophic

setting.

Hot Trip Indicator (HTI):

1 = Internal thermal sensor temperature is above the Hot setting.

Aux0 Trip Indicator (A0TI):

1 = Internal thermal sensor temperature is above the Aux0 setting.

Thermometer Mode Output Valid (TOV):

1 = Thermometer mode is able to converge to a temperature and that

the TR register is reporting a reasonable estimate of the thermal

sensor temperature.

0 = Thermometer mode is off, or that temperature is out of range, or

that the TR register is being looked at before a temperature

conversion has had time to complete.

3:2

00b

Reserved

Direct Catastrophic Comparator Read (DCCR): This bit reads the

output of the Catastrophic comparator directly, without latching via the

Thermometer mode circuit. Used for testing.

Direct Hot Comparator Read (DHCR): This bit reads the output of

the Hot comparator directly, without latching via the Thermometer

mode circuit. Used for testing.

82G33 Datasheet(PDF) 168 Page - Intel Corporation

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