82G33 datasheet(171/437 Pages) INTEL

171 / 437 page

DRAM Controller Registers (D0:F0)

Datasheet

171

5.2.47

THERM1—Hardware Throttle Control

B/D/F/Type:

0/0/0/MCHBAR

Address Offset:

CE4h

Default Value:

00h

Access:

RW/L, RO, RW/L/K

Size:

8 bits

All bits in this register are reset to their defaults by PLTRST#.

Bit

Access &

Default

Description

RW/L

00h

Internal Thermal Hardware Throttling Enable (ITHTE): This bit is

a master enable for internal thermal sensor-based hardware throttling.

0 = Disable. Hardware actions via the internal thermal sensor are

disabled.

1 = Enable. Hardware actions via the internal thermal sensor are

enabled.

RW/L

00h

Internal Thermal Hardware Throttling Type (ITHTT): This policy

bit determines what type of hardware throttling will be enacted by the

internal thermal sensor when enabled by ITHTE.

0 = (G)MCH throttling

1 = DRAM throttling

00h

Reserved

RW/L

00h

Throttling Temperature Range Selection (TTRS): This bit

determines what temperature ranges will enable throttling. Lockable

by bit 0 of this register. See also the throttling registers in MCHBAR

configuration space C0GTC and C1GTC [(G)MCH Thermal Sensor Trip

Enable] and PEFC [Thermal Sensor Trip Enable] which are used to

enable or disable throttling.

0 = Catastrophic only. The Catastrophic thermal temperature range

will enable main memory thermal throttling.

1 = Hot and Catastrophic.

RW/L

00h

Halt on Catastrophic (HOC):

0 = Continue to toggle clocks when the catastrophic sensor trips.

1 = All clocks are disabled when the catastrophic sensor trips. A

system reset is required to bring the system out of a halt from the

thermal sensor.

2:1

00b

Reserved

RW/L/K

00h

Hardware Throttling Lock Bit (HTL): This bit locks bits 7:0 of this

0 = The register bits are unlocked.

1 = The register bits are locked. It may only be set to a 0 by a

hardware reset.

Writing a 0 to this bit has no effect.

82G33 Datasheet(PDF) 171 Page - Intel Corporation

82G33 Datasheet(HTML) 171 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL