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82G33 Datasheet(PDF) 173 Page - Intel Corporation |
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82G33 Datasheet(HTML) 173 Page - Intel Corporation |
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173 / 437 page  DRAM Controller Registers (D0:F0) Datasheet 173 Bit Access & Default Description 4 RWC 0b Catastrophic Thermal Sensor Interrupt Event (CTSIE): 1 = Indicates that a Catastrophic Thermal Sensor trip event occurred based on a lower to higher temperature transition thru the trip point. 0 = No trip for this event Software must write a 1 to clear this status bit. 3 RWC 0b Hot Thermal Sensor Interrupt Event (HTSIE): 1 = Indicates that a Hot Thermal Sensor trip event occurred based on a lower to higher temperature transition thru the trip point. 0 = No trip for this event Software must write a 1 to clear this status bit. 2 RWC 0b Aux0 Thermal Sensor Interrupt Event (A0TSIE): 1 = Indicates that an Aux0 Thermal Sensor trip event occurred based on a lower to higher temperature transition thru the trip point. 0 = No trip for this event Software must write a 1 to clear this status bit. 1:0 RO 00b Reserved |
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