82G33 datasheet(216/437 Pages) INTEL

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PCI Express* Registers (D1:F0)

216

Datasheet

Bit

Access &

Default

Description

Power Indicator Present (PIP):

0 = No power indicator

1 = A Power Indicator is electrically controlled by the chassis for this

slot.

Attention Indicator Present (AIP):

0 = No Attention indicator

1 = An Attention Indicator is electrically controlled by the chassis.

MRL Sensor Present (MSP):

0 = No MRL sensor

1 = MRL Sensor is implemented on the chassis for this slot.

Power Controller Present (PCP):

0 = No power controller

1 = A software programmable Power Controller is implemented for

this slot/adapter (depending on form factor).

Attention Button Present (ABP):

0 = No attention button

1 = An Attention Button for this slot is electrically controlled by the

chassis.

6.1.42

SLOTCTL—Slot Control

B/D/F/Type:

0/1/0/PCI

Address Offset:

B8–B9h

Default Value:

01C0h

Access:

RO, RW

Size:

16 bits

PCI Express Slot related registers allow for the support of Hot Plug.

Bit

Access &

Default

Description

15:13

000b

Reserved

Data Link Layer State Changed Enable (DLLSCE): If the Data

Link Layer Link Active capability is implemented, when set to 1b, this

field enables software notification when Data Link Layer Link Active

field is changed.

Electromechanical Interlock Control (EIC): If an

Electromechanical Interlock is implemented, a write of 1b to this field

causes the state of the interlock to toggle. A write of 0b to this field

has no effect. A read to this register always returns a 0.

82G33 Datasheet(PDF) 216 Page - Intel Corporation

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