USB3503 datasheet(17/82 Pages) SMSC

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USB 2.0 HSIC High-Speed Hub Controller Optimized for Portable Applications

Datasheet

SMSC USB3503A

Revision 1.1 (02-07-13)

DATASHEET

3.3.2

I/O Type Descriptions

3.3.3

Reference Clock

The REFCLK input is can be driven with a square wave from 0 V to VDD33_BYP. The USB3503 only

uses the positive edge of the clock. The duty cycle is not critical.

The USB3503 is tolerant to jitter on the reference clock. The REFCLK jitter should be limited to a peak

to peak jitter of less than 1 ns over a 10

μs time interval. If this level of jitter is exceeded the USB3503

high speed eye diagram may be degraded.

To select the REFCLK input frequency, the REF_SEL pins must be set according to Table 3.3 and

Table 3.4. To select the primary REFCLK frequencies defined in Table 3.3, INT_N must be sampled

high during the Hub.Init stage. If the INT_N pin is not used, the INT_N pin should be tied to

VDD33_BYP. To select the secondary REFCLK frequencies defined in Table 3.4, INT_N must be

sampled low during the Hub.Init stage. If the INT_N pin is not used, the INT_N pin should be tied to

ground. Since the INT_N pin is open-drain during normal function, selecting the secondary REFCLK

frequencies requires that the INT_N pin be driven low from an external source during Hub.Init and then,

after startup, that external source must turn into an input to receive the INT_N signal.

Table 3.2 USB3503 I/O Type Descriptions

I/O TYPE

DESCRIPTION

Digital Input.

Digital Output. Open Drain.

I/O

Digital Input or Output.

A-I/O

Analog Input or Output.

Power

DC input or Output.

Ground

Ground.

Table 3.3 USB3503 Primary Reference Clock Frequencies

REF_SEL[1:0]

FREQUENCY (MHz)

‘00’

38.4

‘01’

26.0

‘10’

19.2

‘11’

12.0

USB3503 Datasheet(PDF) 17 Page - SMSC Corporation

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