USB3503 datasheet(18/82 Pages) SMSC

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USB 2.0 HSIC High-Speed Hub Controller Optimized for Portable Applications

Datasheet

SMSC USB3503A

Revision 1.1 (02-07-13)

DATASHEET

Table 3.4 USB3503 Secondary Reference Clock Frequencies

3.3.4

Interrupt

The general interrupt pin (INT_N) is intended to communicate a condition change within the hub. The

conditions that may cause an interrupt are captured within a register mapped to the serial port

(Register E8h: Serial Port Interrupt Status - INT_STATUS). The conditions that cause the interrupt to

assert can be controlled through use of an interrupt mask register (Register E9h: Serial Port Interrupt

Mask - INT_MASK).

The general interrupt and all interrupt conditions are functionally latched and event driven. Once the

interrupt or any of the conditions have asserted, the status bit will remain asserted until the SOC

negates the bit using the serial port. The bits will then remain negated until a new event condition

occurs. The latching nature of the register causes the status to remain even if the condition that caused

the interrupt ceases to be active. The event driven nature of the register causes the interrupt to only

occur when a new event occurs- when a condition is removed and then is applied again.

The function of the interrupt and the associated status and masking registers are illustrated in

Figure 3.2. Registers & Register bits shown in the figure are defined in Table 5.2, “Serial Interface

Registers,” on page 26.

REF_SEL[1:0]

FREQUENCY (MHz)

‘00’

24.0

‘01’

27.0

‘10’

25.0

‘11’

50.0

Figure 3.2 INT_N Operation

Reserved

Serial Port

Write Logic

INT_N

SET

CLR

INT_MASK

<1>

<2>

<3>

<4>

SET

CLR

INT_STATUS <7>

<0>

SET

CLR

SET

CLR

SET

CLR

SET

CLR

SET

CLR

INT_STATUS<4:0>

SCL/SDA

Hub Configured by USB Host

(HubConf)

Port Power Register Updated

(PrtPwr)

Hub in USB Suspend Mode

(SuspInd)

Suspended OR

NOT Configured

SET

CLR

CFGP.INTSUSP

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