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ADC14X250 Datasheet(PDF) 33 Page - Texas Instruments |
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ADC14X250 Datasheet(HTML) 33 Page - Texas Instruments |
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33 / 69 page ![]() 33 ADC14X250 www.ti.com SLASE49 – DECEMBER 2015 Product Folder Links: ADC14X250 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated 8.5 Register Map Table 6. ADC14X250 Register Map Register ADDRESS DFLT b[7] b[6] b[5] b[4] b[3] b[2] b[1] b[0] CONFIG_A 0x0000 0x3C SR Res (0) ASCEND Res (1) PAL[3:0] Address 0x0001 Reserved DEVICE _CONFIG 0x0002 0x00 Reserved (000000) PD_MODE[1:0] CHIP_TYPE 0x0003 0x03 Reserved (0000) CHIP_TYPE[3:0] CHIP_ID 0x0004 0x01 CHIP_ID[7:0] 0x0005 0x00 CHIP_ID[15:8] CHIP _VER 0x0006 0x00 CHIP_VER[7:0] Address 0x0007-0x000B Reserved VENDOR_ID 0x000C 0x51 VENDOR_ID[7:0] 0x000D 0x04 VENDOR_ID[15:8] SPI_CFG 0x0010 0x01 Reserved (000000) VSPI[1:0] OM1 0x0012 0x81 DF Res (00) IDLE[1:0] SYS_E N Res(01) OM2 0x0013 0x20 Reserved (001) CLKDIV Res (0) Res (0) Res (0) IMB_ADJ 0x0014 0x00 Res (0) AMPADJ[2:0] PHADJ[3:0] Address 0x0015-0x003C Reserved DC_MODE 0x003D 0x00 Reserved (00000) DC_TC DC_EN Address 0x003E-0x0046 Reserved SER_CFG 0x0047 0x00 Res(0) VOD[2:0] Res (0) DEM[2:0] Address 0x0048-0x005F Reserved JESD_CTRL1 0x0060 0x7D SCR _EN K_M1[4:0] Res (0) JESD _EN JESD_CTRL2 0x0061 0x00 SYNC_S EL JSYNC_N Reserved (00) JESD_TEST_MODE[3:0] JESD_RSTEP 0x0062 0x01 JESD_RSTEP[7:0] 0x0063 0x00 JESD_RSTEP[15:8] Address 0x0064-0x006B Reserved JESD_STATUS 0x006C N/A Res (0) LINK SYNC REALIG N ALIGN PLL _LOCK CAL _DONE CLK _RDY Address 0x006D- Reserved |
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