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ADC14X250 Datasheet(PDF) 36 Page - Texas Instruments

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Part # ADC14X250
Description  MSPS Single Channel ADC
PDF  69 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ADC14X250 Datasheet(HTML) 36 Page - Texas Instruments

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36
ADC14X250
SLASE49 – DECEMBER 2015
www.ti.com
Product Folder Links: ADC14X250
Submit Documentation Feedback
Copyright © 2015, Texas Instruments Incorporated
8.5.1.10 IMB_ADJ (Imbalance Adjust), [Address: 0x0014], [Default: 0x00]
Table 16. IMB_ADJ (Imbalance Adjust), [Address: 0x0014], [Default: 0x00]
Bit
Field
Type
Reset
Description
[7]
Reserved
Read or write
0
Reserved. Must be written with 0.
[6:4]
AMPADJ[2:0]
Read or write
000
Analog input amplitude imbalance correction
7 = +30
Ω VIN+, –30 Ω VIN–
6 = +20
Ω VIN+, –20 Ω VIN–
5 = +10
Ω VIN+, –10 Ω VIN–
4 = Reserved
3 = –30
Ω VIN+, +30 Ω VIN–
2 = –20
Ω VIN+, +20 Ω VIN–
1 = –10
Ω VIN+, +10 Ω VIN–
0 = +0
Ω VIN+, –0 Ω VIN– (default)
Resistance changes indicate variation of the internal single-ended
termination.
[3:0]
PHADJ[3:0]
Read or write
0000
Analog input phase imbalance correction
15 = +1.68 pF VIN–
...
9 = +0.48 pF VIN–
8 = +0.24 pF VIN–
7 = +1.68 pF VIN+
...
2 = +0.48 pF VIN+
1 = +0.24 pF VIN+
0 = +0 pF VIN+, +0 pF VIN– (default)
Capacitance changes indicate the addition of internal capacitive load
on the given pin.
8.5.1.11 DC_MODE (DC Offset Correction Mode), [Address: 0x003D], [Default: 0x00]
Table 17. DC_MODE (DC Offset Correction Mode), [Address: 0x003D], [Default: 0x00]
DC_MODE (DC Offset Correction Mode)
Bit
Field
Type
Reset
Description
[7:3]
Reserved
Read or
write
00000
Reserved and must be written as 00000.
[2:1]
TC_DC
Read or
write
00
DC offset filter time constant.
The time constant determines the filter bandwidth of the DC high-pass filter.
TC_DC
Time Constant
(FS = 250
MSPS)
3-dB Bandwidth
(FS = 250
MSPS)
3-dB Bandwidth
(Normalized)
00
17 µs
9.3 kHz
37e–6 × Fs
01
130 µs
1.2 kHz
4.9e–6 × Fs
10
1.1 ms
150 Hz
605e–9 × Fs
11
8.4 ms
19 Hz
76e–9 × Fs
[0]
DC_EN
Read or
Write
0
DC offset correction enable
0 : Disable DC offset correction
1 : Enable DC offset correction



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