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ADC14X250 Datasheet(PDF) 41 Page - Texas Instruments |
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ADC14X250 Datasheet(HTML) 41 Page - Texas Instruments |
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41 / 69 page ![]() + ² + ² 0.47nH 0.47nH 5: 5.2pF 5: 5.2pF VIN+ VIN- VDD GND VCM 0 VIN-DIFF VIN-CM VCM 0 VIN+ VIN- GND 0 Single-Ended Differential Mode Common Mode 41 ADC14X250 www.ti.com SLASE49 – DECEMBER 2015 Product Folder Links: ADC14X250 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Figure 39. Differential Signal Waveform and Signal Imbalance 9.1.1.2 Analog Input Network Model Matching the impedance of the driving circuit to the input impedance of the ADC can be important for low distortion performance and a flat gain response through the network across frequency. In very broadband applications or lowpass applications, the ADC driving network must have very low impedance with a small termination resistor at the ADC input to maximize the bandwidth and minimize the bandwidth limitation posed by the capacitive load of the ADC input. In bandpass applications, a designer may either design the anti-aliasing filter to match to the complex impedance of the ADC input at the desired intermediate frequency, or consider the resistive part of the ADC input to be part of the resistive termination of the filter and the capacitive part of the ADC input to be part of the filter itself. The analog input circuit of the ADC14X250 device is a buffered input with an internal differential termination. Compared to an ADC with a switched-capacitor input sampling network that has an input impedance that varies with time, the ADC14X250 device provides a constant input impedance that simplifies the interface design joining the ADC and ADC driver. A simplified passive model of the ADC input network is shown in Figure 40 that includes the termination resistance, input capacitance, parasitic bond-wire inductance, and routing parastics. Figure 40. Simplified Analog Input Network Circuit Model A more accurate load model is described by the measured differential SDD11 (100- Ω) parameter model. A plot of the differential impedance derived from the model is shown on the Smith chart of Figure 41. The model includes the internal 200- Ω resistive termination, the capacitive loading of the input buffer, and stray parasitic impedances like bond wire inductance and signal routing coupling. The SDD11 model may be used to back-calculate the impedance of the ADC input at a frequency of interest. |
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