ADC14X250 datasheet(48/69 Pages) TI1

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100:

0.1uF

SYSREF

Transmitter

100:-diff

VIS = 0.5V

1k:

SYSREF

Receiver

2.5k:

10k:

1.2V

1.5k:

PCB Channel

SYSREF

Detection

Feature

SYSREF

Offset

Feature

S1a

S1b

S2a

S2b

ADC14X250

SLASE49 – DECEMBER 2015

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Product Folder Links: ADC14X250

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9.1.2.3 Driving the SYSREF Input

The SYSREF input interface circuit is composed of the differential receiver, internal common-mode bias,

SYSREF offset feature, and SYSREF detection feature.

A high impedance (10-k

Ω) reference biases the input common-mode through internal 1-kΩ termination resistors.

The bias voltage is similar to the CLKIN input common-mode bias, but the internal differential termination is

different. The SYSREF input requires an external 100-

Ω termination. A network of resistors and switches are

included at the input interface to provide a programmable DC offset, referred to as the SYSREF offset feature.

This feature is configurable through the SPI and may be utilized to force a voltage offset at the SYSREF input in

the absence of an active SYSREF signal. Following the receiver, an AND gate provides a method for detecting

or ignoring incoming SYSREF events.

The timing relationship between the CLKIN and SYSREF signal is very important in a JESD204B system.

Therefore, the signal path network of the CLKIN and SYSREF signals must be as similar as possible to ensure

that the signal relationship is maintained from the launch of the signal, through their respective channels to the

CLKIN and SYSREF input receivers.

TI recommends AC coupling for the SYSREF interface as shown in Figure 50. This network closely resembles

the AC coupled interface of the CLKIN input shown in Figure 46 with the exception of the 100-

Ω termination

resistor on the source side of the AC coupling capacitors. This resistor is intentionally placed on the source side

of the AC coupling capacitors, so that the termination does not interfere with the DC biasing capabilities of the

SYSREF offset feature. In the case of AC coupling, the coupling capacitors of both the CLKIN and SYSREF

interfaces, as well as the SYSREF termination resistor, must be placed as close as possible to the pins of the

ADC14X250 device.

Figure 50. SYSREF Input Receiver and AC Coupled Interface

DC coupling of the SYSREF interface is possible, but not recommended. DC coupling allows all possible

SYSREF signaling types to be used without the use of the SYSREF offset feature, but it has strict common-mode

range requirements. The example DC coupled configuration of Figure 51 uses the same technique for the CLKIN

example DC coupled interface and also includes the 100-

Ω external termination. A drawback of the example DC

coupled interface is that the resistor divider draws a constant DC current that must be sourced by the SYSREF

transmitter.

ADC14X250 Datasheet(PDF) 48 Page - Texas Instruments

ADC14X250 Datasheet(HTML) 48 Page - Texas Instruments

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