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DP8344 Datasheet(PDF) 25 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # DP8344
Description  Biphase Communications Processor?좦CP
PDF  184 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP8344 Datasheet(HTML) 25 Page - National Semiconductor (TI)

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20 CPU Description (Continued)
The BCP also has a specialized relative jump instruction
called relative Jump with Rotate and Mask on source regis-
ter JRMK This instruction facilitates the decoding of regis-
ter fields often involved in communications processing
JRMK does this by rotating and masking a copy of its regis-
ter operand to form a signed program counter displacement
which usually points into a jump table Table 2-15 shows the
syntax and operation of the JRMK instruction
JRMK’s masking (setting to zero) the least significant bit of
the displacement allows the construction of a jump table
using either one or two word instructions for instance a
table of JMP andor LJMP instructions respectively The
example in
Figure 2-6 demonstrates the JRMK instruction
decoding the address frame of the 3299 Terminal Multiplex-
er protocol which is located in the ReceiveTransmit Regis-
ter
RTR 4–2
The BCP has two unconditional call instructions CALL
which supports relative instruction addressing and LCALL
(Long CALL) which supports absolute instruction address-
ing These instructions push the following information onto
the CPU’s internal Address Stack the address of the next
instruction the status of the Global Interrupt Enable flag
GIE the status of the ALU flags Z
C
N and V and
the status of which register banks are currently active Table
2-16 lists the two unconditional call instructions Note that
the Address Stack is only twelve positions deep therefore
the BCP allows twelve levels of nested subroutine invoca-
tions (this includes both interrupts and calls)
TABLE 2-15 JRMK Instruction
Syntax
Instruction Operation
Displacement
Addressing Mode
Range
JRMK
Rs b m
(a) Rotate a copy of register ‘‘Rs’’ ‘‘b’’ bits to the right
b
128 a126
Register
(b) Mask the most significant ‘‘m’’ bits and the least
significant bit of the above result
(c) PC a resulting displacement (sign extended)
x PC
Note
PC e Program Counter contents initially points to instruction following jump
Example Code
JRMK
RTR14
decode terminal address
LJMP
ADDR0
jump to device handler
0
LJMP
ADDR1
jump to device handler
1
LJMP
ADDR7
jump to device handler
7
Instruction Execution
JRMK Displacement Register Contents
(a)
Copy RTR into JRMK’s displacement register
x
x
x
A2
A1
A0
y
y
(b)
Rotate displacement register 1 bit to the right
y
x
x
x
A2
A1
A0
y
(c)
AND result with ‘‘00001110’’ binary mask
0
0
0
0
A2
A1
A0
0
(d)
Sign extend resulting displacement and add
it to the program counter (PC)
If the bits A2 A1 A0 equal ‘‘0 0 1’’ binary then
a
2 is added to the Program Counter
0
0
0
0
0
0
1
0
(ie PC a 2
x PC)
(e)
Execute the instruction pointed to by the PC
which in this example is
LJMP
ADDR1
FIGURE 2-6 JRMK Instruction Example
TABLE 2-16 Unconditional Call Instructions
Syntax
Instruction Operation
Operand
Addressing Mode
Range
CALL
n
PC
GIE
ALU flags
reg bank selection
x Address Stack
b
128 a127
Immediate
PC a n (sign extended)
x PC
LCALL
nn
PC
GIE
ALU flags
reg bank selection
x Address Stack
0 64k
Absolute
nn
x PC
Note
PC e Program Counter contents initially points to instruction following call
GIE e Global Interrupt Enable bit
e
concatenation operator combines operands together forming one long operand
25



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