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DP8344 Datasheet(PDF) 57 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # DP8344
Description  Biphase Communications Processor?좦CP
PDF  184 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP8344 Datasheet(HTML) 57 Page - National Semiconductor (TI)

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30 Transceiver (Continued)
When formatting a 3299 address frame the procedure is
the same as for a 3270 frame with RTR 7–2
defining
the address to be transmitted The only bit in TCR which
has any functional meaning in this mode is OWP
which
controls the type of parity required on B1 – B8 Similarly
when the receiver de-formats a 3299 address frame the
received address bits are loaded into RTR 7–2
RTR
1–0
and TSR 2–0
are undefined
The POLL POLLACK and TTAR flags in the Network
Command Flag Register are valid only in 3270 and 3299
(excluding the 3299 address frame) modes These flags are
decodes of their respective coax commands as defined in
Table 3-4 The Data Error or Message End DEME flag
(also in the NCF register) indicates different information
depending on the selected protocol In 3270 and 3299
DEME is set when B10 of the received frame does not
match the locally generated odd parity on bits B2 – B9 of the
received frame
DEME is not part of the receiver error
logic it functions only as a status flag to the CPU These
flags are decoded from the last location in the FIFO and are
valid only when DAV is asserted they are cleared by read-
ing RTR and must be checked before advancing the re-
ceiver FIFO
5250 Modes
The biphase data is inverted in the 5250 protocol relative to
32703299 (see the Protocol sectionIBM 5250) Depend-
ing on the external line interface circuitry the transceiver’s
biphase inputs and outputs may need to be inverted by as-
serting the RIN (Receiver INvert) and TIN (Transmitter
INvert) control bits in TMR
For information on how data must be organized in TCR
and
RTR
for input to the transmitter and how data ex-
tracted from a received frame is organized by the receiver
and mapped into TSR and RTR
see
Figure 3-10
To transmit a 5250 message the least significant 4 bits of
TCR
must first be set up with the correct address and
parity control information The station address field (B4 – B6)
is defined by TCR 2–0
and OWP controls the type of
parity (even or odd) calculated on B4 – B15 and transmitted
as B3 When the 8-bit data byte is written to
RTR
the
resulting composite 12-bit word is loaded into the transmit
FIFO starting the transmitter The same
TCR
contents
can be used for more than one frame of a multi-frame trans-
mission or changed for each frame
The 5250 protocol defines bits B0 – B2 as fill bits which the
transmitter automatically appends to the parity bit (B3) to
TABLE 3-4 Decode of 3270 Coax Commands
Received Word
Flag
Description
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
0
0
0
0
0
0
0
0
0
0
RAR
TTAR (Clean Status) Received
X
X
X
1
0
0
0
1
X
1
ACK
POLLACK Command Received
X
X
X
0
0
0
0
1
X
1
POLL
POLL Command Received
All flags cleared by reading RTR
TLF9336 – 49
FIGURE 3-10 5250 Frame AssemblyDisassembly Description
57



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