DP8344 datasheet(4/184 Pages) NSC

4 / 184 page

List of Illustrations

Block Diagram of Typical BCP System

Biphase Encoding

1-1

IBM 3270 Message Format

1-2

Simplified Block Diagram

1-3

Memory Configuration

1-4

Effect of Memory Wait States on Timing

1-5

1-6a

Data Memory WRITE Data Flow

1-6b

Data Memory READ Data Flow

1-6c

WRITE to Transmitter Data Flow

1-6d

READ from Receiver Data Flow

1-6e

Load Immediate Data Data Flow

1-6f

Basic Remote Interface

1-7

2-1

Timer Block Diagram

2-2

Timer Interrupt Diagram

2-3

Index Register Map

2-4

Coding Examples of Equivalent Conditional Jump Instructions

2-5

JRMK Instruction Example

2-6

Condition Code Register ALU Flags

2-7

Carry and Overflow Calculations

2-8

Shifts’ Effect on Carry

2-9

Rotates’ Effect on Carry

2-10

Multi-Byte Arithmetic Instruction Sequences

2-11

CPU-CLK Synchronization with X1

2-12

Changing from OCLK2 to OCLK2-13

Two T-state Instruction

2-14

Three T-state Instruction

2-15

Three T-state Data Memory Write Instruction

2-16

Three T-state Data Memory Read Instruction

2-17

Four T-state Data Memory Read Instruction

2-18

Four T-state Program Control Instruction

2-19

Four T-state Two Word Instruction

2-20

Data Memory Write with One Wait State

2-21

Data Memory Read with One Wait State

2-22

Data Memory Read with Two Wait States

2-23

Two T-state Instruction with Two Wait States

2-24

Four T-state Instruction with One Wait State

2-25

Data Memory Access Wait Timing

2-26

Two T-state Instruction WAIT Timing

2-27

Three T-state Program Control Instruction WAIT Timing

2-28

Four T-state Program Control Instruction WAIT Timing

2-29

LOCK Timing

2-30

LOCK Timing with One Wait State

2-31

CPU Start-Up Timing

2-32

Functional State Diagram of CPU Timing

2-33

Interrupt Timing

2-34

DP8344B Operation with Crystal

2-35

DP8344B Operation with External Clock

2-36

DP8344 Datasheet(PDF) 4 Page - National Semiconductor (TI)

DP8344 Datasheet(HTML) 4 Page - National Semiconductor (TI)

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