DP8344 datasheet(26/184 Pages) NSC

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20 CPU Description (Continued)

The BCP has one conditional call instruction capable of

testing any bit in any currently active CPU register This call

only supports absolute instruction addressing Table 2-17

shows the conditional call instruction syntax and operation

The return instruction complements the above call instruc-

tions Two versions of the return instruction exist the un-

condtional return and the conditional return When the un-

conditional return instruction is executed it pops the last

address on the CPU’s Address Stack into the program

counter and it can optionally affect the GIE bit the ALU

flags and the register bank selection Table 2-18 shows the

syntax and operation of the unconditional return instruction

The conditional return instruction functions the same as the

unconditional return instruction if a desired condition is met

As with the conditional jump instruction the conditional re-

turn instruction has two possible syntaxes Table 2-19 lists

the syntax for the conditional return The ‘‘f’’ flags and the

‘‘cc’’ conditions for the return instruction are the same as

for the conditional jump instruction therefore refer to Table

2-12 and Table 2-13 for the listing of ‘‘f’’ and ‘‘cc’’ respec-

tively

TABLE 2-17 Conditional Call Instruction

Syntax

Instruction Operation

Operand Range

Addressing Mode

LCALL

Rs p s nn

If the bit of register ‘‘Rs’’ in position

0 64k

‘‘p’’ is in the state ‘‘s’’ then

GIE

ALU flags

reg bank selection

x Address Stack

x PC

End if

Note

PC e Program Counter contents initially points to instruction following call

GIE e Global Interrupt Enable bit

concatenation operator combines operands together forming one long operand

TABLE 2-18 Unconditional Return Instruction

Syntax

Instruction Operation

RET

Case ‘‘g’’ of

0 leave GIE unaffected (default)

1 restore GIE from Address Stack

2 set GIE

3 clear GIE

End case

If ‘‘rf’’ e 1 then

restore ALU flags from Address Stack

restore register bank selection from Address Stack

Else (the default)

leave the ALU flags and register bank selections unchanged

End if

Address Stack

x PC

Note

PC e Program Counter

GIE e Global Interrupt Enable bit

surrounds optional operands that are not part of the instruction syntax

Optional operands may either be specified or omitted

TABLE 2-19 Conditional Return Instruction

Syntax

Instruction Operand

RETF

f s

If the flag ‘‘f’’ is in the state ‘‘s’’ then perform a RET g

Rcc

If the condition ‘‘cc’’ is met then perform a RET g

Note

See Table XVIII for an explanation of ‘‘RET g

’’

surrounds optional operands that are not part of the instruction syntax

Optional operands may either be specified or omitted

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