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DP8344 Datasheet(PDF) 24 Page - National Semiconductor (TI) |
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DP8344 Datasheet(HTML) 24 Page - National Semiconductor (TI) |
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24 / 184 page  20 CPU Description (Continued) mind that the Jcc instruction is just an optional syntax for the conditional JMP instruction The example in Figure 2-5 demonstrates two possible ways to code the conditional relative jump instruction when test- ing for a false Z flag in CCR In the example assume that the symbol ‘‘Z’’ equals ‘‘000’’ binary that the symbol ‘‘NS’’ equals ‘‘0’’ binary and that the symbol ‘‘SKIPIT’’ points to the desired instruction with which to begin execu- tion if Z is false On the other hand the conditional absolute jump instruc- tion LJMP can test any bit in any currently active CPU reg- ister Table 2-14 shows the conditional long jump instruction syntax JMP ZNSSKIPIT If Z 40 goto SKIPIT -or- JNZ SKIPIT If Z 40 goto SKIPIT FIGURE 2-5 Coding Examples of Equivalent Conditional Jump Instructions TABLE 2-11 Conditional Relative Jump Instruction Syntax Instruction Operation Operand Range Addressing Mode JMP fsn If the flag ‘‘f’’ is in the state ‘‘s’’ b 128 a127 Immediate then PC a n (sign extended) xPC Jcc n If the condition ‘‘cc’’ is met b 128 a127 Immediate then PC a n (sign extended) xPC Note PC e Program Counter contents initially points to instruction following jump TABLE 2-12 ‘‘f’’ Flags ‘‘f’’(Binary) Flag Flag Name Register Containing Flag 000 Z Zero CCR 001 C Carry CCR 010 V Overflow CCR 011 N Negative CCR 100 RA Receiver Active TSR 101 RE Receiver Error TSR 110 DAV Data Available TSR 111 TFF Transmitter FIFO Full TSR TABLE 2-13 ‘‘cc’’ Conditions Tested ‘‘cc’’ Field Condition Tested for Flag ‘‘f’’’s Condition Z Zero Z e 1 NZ Not Zero Z e 0 EQ Equal Z e 1 NEQ Not Equal Z e 0 C Carry C e 1 NC No Carry C e 0 V Overflow V e 1 NV No Overflow V e 0 N Negative N e 1 P Positive N e 0 RA Receiver Active RA e 1 NRA Not Receiver Active RA e 0 RE Receiver Error RE e 1 NRE No Receiver Error RE e 0 DA Data Available DAV e 1 NDA No Data Available DAV e 0 TFF Transmitter FIFO FULL TFF e 1 NTFF Transmitter FIFO Not Full TFF e 0 TABLE 2-14 Conditional Absolute Jump Instruction Syntax Instruction Operation Operand Range Addressing Mode LJMP Rspsnn If the bit of register ‘‘Rs’’ in 0 64k Register Absolute position ‘‘p’’ is in the state ‘‘s’’ then nn xPC Note PC e Program Counter 24 |
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