DP8344 datasheet(7/184 Pages) NSC

7 / 184 page

List of Tables (Continued)

Unsigned Comparison Results

2-22

Signed Comparison Results

2-23

Data Memory Wait States

2-24

Instruction Memory Wait States

2-25

BIRQ Control Summary

2-26

ICR Interrupt Mask Bits and Interrupt Priority

2-27

Interrupt Vector Generation

2-28

Recommended Crystal Parameters

2-29

Protocol Mode Definitions

3-1

Transceiver Interrupts

3-2

Receiver Interrupts

3-3

Decode of 3270 Coax Commands

3-4

RIAS Inputs and Outputs

4-1

Note

To match Timing table number with appropriate Timing illustration Tables 5-1 and 5-2 are purposely omitted

Data Memory Read Timing

5-3

Data Memory Write Timing

5-4

Instruction Memory Timing

5-5

Clock Timing

5-6

Transceiver Timing

5-7

Analog and DATA-IN Timing

5-8

Interrupt Timing

5-9

Control Pin Timing

5-10

Buffered Read of PC RIC

5-11

Buffered Read of DMEM

5-12

Buffered Read of IMEM

5-13

Latched Read of PC RIC

5-14

Latched Read of DMEM

5-15

Latched Read of IMEM

5-16

Slow Buffered Write of PC RIC

5-17

Slow Buffered Write of DMEM

5-18

Slow Buffered Write of IMEM

5-19

Fast Buffered Write of PC RIC

5-20

Fast Buffered Write of DMEM

5-21

Fast Buffered Write of IMEM

5-22

Latched Write of PC RIC5-23

Latched Write of DMEM

5-24

Latched Write of IMEM

5-25

Remote Rest Times

5-26

Remote Interface WAIT Timing

5-27

WAIT Timing after Remote Access

5-28

Notational Conventions for Instruction Set

6-1

Instructions vs T-states Affected Flags and Bus Timing

6-2

Instruction Opcodes

6-3

DP8344B Application Notes

6-4

DP8344 Datasheet(PDF) 7 Page - National Semiconductor (TI)

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