DP8344 datasheet(60/184 Pages) NSC

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30 Transceiver (Continued)

Legend

f To 211 Transformer

f From DP8344 Outputs

TLF9336 – G2

FIGURE 3-13 BCP Driver Design

Legend

f To 211 Transformer

Switch Open

Twisted Pair

Switch Closed

Coax

TLF9336 – G3

FIGURE 3-14 BCP CoaxTwisted Pair Front End

The cable shield must be continuous throughout the trans-

mission system and be grounded at the system unit and

each station Since twinax connectors have exposed metal

connected to their shield grounds care must be taken not to

expose them to noise sources The polarity of the two inner

conductors must also be maintained throughout the trans-

mission system

The transmission system is implemented in a balanced cur-

rent mode every receivertransmitter pair is directly cou-

pled to the twinax at all times Data is impressed on the

transmission line by unbalancing the line voltage with the

driver current The system requires passive termination at

both ends of the transmission line The termination resist-

ance value is given by

Rt e ZO2 where

Rt Termination Resistance

ZO Characteristic Impedance

In practice termination is accomplished by connecting both

conductors to the shield via 549X 1% resistors hence the

characteristic impedance of the twinax cable of 107X g5%

at 10 MHz Intermediate stations must not terminate the

line each is configured for ‘‘pass-through’’ instead of ‘‘ter-

minate’’ mode Stations do not have to be powered on to

pass twinax signals on to other stations all of the receiver

transmitter pairs are DC coupled Consequently devices

must never output any signals on the twinax line during pow-

er-up or down that could be construed as data or interfere

with valid data transmission between other devices

Driver Circuits for the DP8344B

The transmitter interface on the DP8344B is sufficiently

general to allow use in 3270 5250 and 8-bit transmission

systems Because of this generality some external hard-

ware is needed to adapt the outputs to form the signals

necessary to drive the twinax line The chip provides three

signals DATA-OUT DATA-DLY and TX-ACT DATA-OUT is

biphase serial data (inverted) DATA-DLY is the biphase se-

rial data output (non-inverted) delayed one-quarter bit-time

TX-ACT or transmitter active signals that serial data is be-

ing transmitted when asserted DATA-OUT and DATA-DLY

can be used to form the A and B phase signals with their

three levels by the circuit shown in

Figure 3-15 TX-ACT is

used as an external transmitter enable The BCP can invert

the sense of the DATA-OUT and DATA-DLY signals by as-

serting TIN

TMR 3

This feature allows both 3270 and

5250 type biphase data to be generated andor utilization

of inverting on non-inverting transmitter stages

Drivers for the 5250 environment may not place any signals

on the transmission system when not activated The power-

on and off conditions of drivers must be prevented from

causing noise on the system since other devices may be in

operation

Figure 3-15 shows a ‘‘DC power good’’ signal

enabling the driver circuit This signal will lock out conduc-

tion in the drivers if the supply voltage is out of tolerance

Twinax signals can be viewed as consisting of two distinct

phases phase A and phase B each with three levels off

DP8344 Datasheet(PDF) 60 Page - National Semiconductor (TI)

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