DM504 datasheet(102/211 Pages) TI1

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vouti_clk

vouti_vsync

vouti_hsync

vouti_d[23:0]

vouti_de

vouti_fld

data_1 data_2

data_n

odd

even

SWPS049-018

vouti_clk

Falling-edge Clock Reference

Rising-edge Clock Reference

102

DM504

SPRS977A – NOVEMBER 2016 – REVISED JANUARY 2017

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Specifications

(1) P = output vout1_clk period in ns.

(2) All pads/balls configured as vouti_* signals must be programmed to use slow slew rate by setting the corresponding

CTRL_CORE_PAD_*[SLEWCONTROL] register field to SLOW (0b1).

Figure 5-15. DPI Video Output(1)(2)(3)

(1) The configuration of assertion of the data can be programmed on the falling or rising edge of the pixel clock.

(2) The polarity and the pulse width of vout1_hsync and vout1_vsync are programmable, refer to the DSS section of the device TRM.

(3) The vout1_clk frequency can be configured, refer to the DSS section of the device TRM.

5.9.6.4

ISS

NOTE

For more information, see the Imaging Subsystem chapter of the device TRM.

The imaging subsystem (ISS) deals with the processing of the pixel data coming from an external image

sensor or data from memory (image format encoding and decoding can be done to and from memory).

With its subparts, such as interfaces and interconnects, image signal processor (ISP), and still image

coprocessor (SIMCOP), the ISS is a key component for the following use cases:

•

Rear View Camera

•

Front View Stereo Camera

•

Surround View Camera

The ISS is mainly composed of CAL_A, CAL_B, LVDS-RX camera interfaces, a parallel interface (CPI),

an ISP, and a block-based imaging accelerator (SIMCOP).

•

The Camera Adapter Layer (CAL_A) supports MIPI® CSI2 protocol with four data lanes. The CAL_A is

targeted as sensor capture interface and write DMA, while CAL_B is targeted as read DMA engine and

does not support sensor capture.

DM504 Datasheet(PDF) 102 Page - Texas Instruments

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