Electronic Components Datasheet Search
  English  ▼

X  

DM504 Datasheet(PDF) 170 Page - Texas Instruments

Part # DM504
Description  SoC for Vision Analytics 12mm Package (ABE) Silicon Revision 2.0
PDF  211 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

DM504 Datasheet(HTML) 170 Page - Texas Instruments

Back Button DM504 Datasheet HTML 166Page - Texas Instruments DM504 Datasheet HTML 167Page - Texas Instruments DM504 Datasheet HTML 168Page - Texas Instruments DM504 Datasheet HTML 169Page - Texas Instruments DM504 Datasheet HTML 170Page - Texas Instruments DM504 Datasheet HTML 171Page - Texas Instruments DM504 Datasheet HTML 172Page - Texas Instruments DM504 Datasheet HTML 173Page - Texas Instruments DM504 Datasheet HTML 174Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 170 / 211 page
background image
170
DM504
SPRS977A – NOVEMBER 2016 – REVISED JANUARY 2017
www.ti.com
Submit Documentation Feedback
Detailed Description
Copyright © 2016–2017, Texas Instruments Incorporated
•
Cross-triggering
–
Provides a way to propagate debug (trigger) events from one processor, subsystem, or module to
another:
•
Subsystem A can be programmed to generate a debug event, which can then be exported as a
global trigger across the device.
•
Subsystem B can be programmed to be sensitive to the trigger line input and to generate an
action on trigger detection.
–
Two global trigger lines are implemented
–
Device-level cross-triggering is handled by the XTRIG (TI cross-trigger) module implemented in the
debug subsystem
–
For more information about cross-triggering, see section Cross-Triggering in chapter On-Chip
Debug Support of the Device TRM.
•
Suspend
–
Provides a way to stop a closely coupled hardware process running on a peripheral module when
the host processor enters debug state
–
For more information about suspend, see section Suspend in chapter On-Chip Debug Support of
the Device TRM.
•
Processor trace
–
C66x (DSP) processor trace is supported
–
Two exclusive trace sinks:
•
CoreSight Trace Port Interface Unit (CS_TPIU) – trace export to an external trace receiver
•
CTools Trace Buffer Router (CT_TBR) in system bridge mode – trace export through USB
–
For more information, see section Processor Trace in chapter On-Chip Debug Support of the
Device TRM.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com