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FDC37M607 Datasheet(PDF) 27 Page - SMSC Corporation |
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FDC37M607 Datasheet(HTML) 27 Page - SMSC Corporation |
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27 / 182 page  27 Model 30 Mode BITS 0 - 1 DATA RATE SELECT These bits control the data rate of the floppy controller. See Table 11 for the settings corresponding to the individual data rates. The data rate select bits are unaffected by a software reset, and are set to 250 Kbps after a hardware reset. BIT 2 NOPREC This bit reflects the value of NOPREC bit set in the CCR register. BIT 3 DMAEN This bit reflects the value of DMAEN bit set in the DOR register bit 3. BITS 4 - 6 UNDEFINED Always read as a logic "0" BIT 7 DSKCHG This bit monitors the pin of the same name and reflects the opposite value seen on the disk cable or the value programmed in the Force Disk Change Register (see Configuration Register LD8:CRC1[1:0]). 7 6 5 4 3 2 1 0 DSK CHG 0 0 0 DMAEN NOPREC DRATE SEL1 DRATE SEL0 RESET COND. N/A 0 0 0 0 0 1 0 |
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