FDC37M607 datasheet(89/182 Pages) SMSC

89 / 182 page

EXTENDED CAPABILITIES PARALLEL PORT

ECP provides a number of advantages, some of

which are listed below. The individual features

are explained in greater detail in the remainder

of this section.

•

High performance half-duplex forward and

reverse channel

•

Interlocked handshake, for fast reliable

transfer

•

Optional single byte RLE compression for

improved throughput (64:1)

•

Channel addressing for low-cost peripherals

•

Maintains link and data layer separation

•

Permits the use of active output drivers

•

Permits the use of adaptive signal timing

•

Peer-to-peer capability

Vocabulary

The following terms are used in this document:

assert:

When a signal asserts it transitions to a

"true" state, when a signal deasserts it

transitions to a "false" state.

forward: Host to Peripheral communication.

reverse: Peripheral to Host communication

Pword: A port word; equal in size to the width

of the ISA interface. For

this

implementation, PWord is always 8

bits.

A high level.

A low level.

These terms may be considered synonymous:

•

PeriphClk, nAck

•

HostAck, nAutoFd

•

PeriphAck, Busy

•

nPeriphRequest, nFault

•

nReverseRequest, nInit

•

nAckReverse, PError

•

Xflag, Select

•

ECPMode, nSelectln

•

HostClk, nStrobe

•

Reference Document:

IEEE 1284 Extended

Capabilities Port Protocol and ISA Interface

Standard, Rev 1.14, July 14, 1993.

This

document is available from Microsoft.

The bit map of the Extended Parallel Port

registers is:

Note

data

PD7

PD6

PD5

PD4

PD3

PD2

PD1

PD0

ecpAFifo

Addr/RLE

Address or RLE field

dsr

nBusy

nAck

PError

Select

nFault

dcr

Direction

ackIntEn

SelectIn

nInit

autofd

strobe

cFifo

Parallel Port Data FIFO

ecpDFifo

ECP Data FIFO

tFifo

Test FIFO

cnfgA

cnfgB

compress

intrValue

Parallel Port IRQ

Parallel Port DMA

ecr

MODE

nErrIntrEn

dmaEn

serviceIntr

full

empty

Note 1: These registers are available in all modes.

Note 2: All FIFOs use one common 16 byte FIFO.

Note 3: The ECP Parallel Port Config Reg B reflects the IRQ and DRQ selected by the

Configuration Registers.

FDC37M607 Datasheet(PDF) 89 Page - SMSC Corporation

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