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LTC6952 Datasheet(PDF) 35 Page - Analog Devices |
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LTC6952 Datasheet(HTML) 35 Page - Analog Devices |
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35 / 80 page ![]() LTC6952 35 6952f For more information www.analog.com Preliminary Technical Data Advance Product Information Subject to Change Rev PrA OPERATION Table 20. Serial Port Register Bit Field Summary BITS DESCRIPTION DEFAULT ADDR ADELx[5:0] OUT0 Analog Delay Setting 0 Various BST REF Buffer Boost Current 1 h02 CP[4:0] CP Output Current h13 h0A CPDN Force CP Down 0 h0A CPINV Invert PFD Phase 0 h0B CPMID CP Bias to Mid-Rail 1 h0B CPRST CP Hi-Z 1 h0A CPUP Force CP Up 0 h0A CPWIDE Extend CP Pulse Width 0 h0B DDELx[11:0] OUTx Delay in ½ VCO Cycles h000 Various EZMD EZSync Mode 0 h0B FILTR REF Input Buffer Filter 0 h02 FILTV VCO Input Buffer Filter 0 h02 INVSTAT Invert STAT Output 1 h01 LKCT[1:0] PLL Lock Cycle Count: 0 = Disabled, 1 = 32 Counts, 2 = 256 Counts, 3 = 2048 Counts h3 h06 LKWIN PLL Lock Indicator Window: 0 = 3ns, 1 = 10ns 0 h06 LOCK PLL Lock Indicator Flag h00 LOCK PLL Lock Indicator Flag Inverted h00 MDx[2:0] OUTx 2N Value 0 Various MODEx[1:0] SYSREF Mode (SRQENx=1): 0 = Free Run 1 = Gated Pulses 2 = Request Passthrough 3 = 2SYSCNT Pulses 0 Various MPx[4:0] OUTx Prescaler Value h0 Various ND[15:0] N Divider Value h002D h08, h09 OINVx OUTx Inversion 0 Various PARSYNC ParallelSync Timing Enable 0 h06 PART[3:0] Part Code (h2 = 6952, h3=6953) h38 PDALL Full Chip Power-Down 0 h02 PDPLL Powers Down REF, R DIV, PFD, CP, N DIV 0 h02 PDREFPK Powers Down REF Input Signal Detector 0 h02 PDVCOPK Powers Down VCO Input Signal Detector 0 h02 PDx[1:0] OUTx Power-Down Mode: 0 = Normal Operation 1 = Output Muted to Logic “0” 2 = Power Down Output Driver 3 = Power Down Full Divider h0 Various POR Force Power-on-Reset 0 h02 RAO Enable REF Alignment to Output Mode 0 h06 RD[9:0] R Divider Value (RD[9:0] > 0) 1 h06,h07 REFOK Reference Valid Flag h00 REFOK Reference Not Valid Flag h00 REV[3:0] Revision Code h38 SRQENx Enable SYNC or SYSREF on OUTx 0 Various SRQMD 0 - Synchronization Mode 1 - SYSREF Request Mode 0 h0B SSRQ Software SYNC or SYSREF Request 0 h0B SYSCT[1:0] SYSREF pulse count for MODEx=3: 0=One Pulse, 1=Two Pulses, 2=Four Pulses, 3=Eight Pulses h3 h0B TEMPO Enable Temperature Measurement Diode on STAT h05 UNLOCK PLL Unlock Flag h00 VCOOK VCO Valid Flag h00 VCOOK VCO Not Valid Flag h00 x[6:0] STAT Output or Mask h2A h01 |
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