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LTC6952 Datasheet(PDF) 14 Page - Analog Devices

Part # LTC6952
Description  Ultralow Jitter, 4.5GHz PLL with 11 Outputs and JESD204B Support
PDF  80 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC6952 Datasheet(HTML) 14 Page - Analog Devices

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LTC6952
14
6952f
For more information www.analog.com
Preliminary Technical Data
Advance Product Information Subject to Change
Rev PrA
EZS_SRQ+, EZS_SRQ– (Pins 47, 48): Synchronization
or SYSREF Request Input. Bit SRQMD defines this dif-
ferential or single-ended input as an EZSync request or
SYSREF request. It can operate as a differential input,
or EZS_SRQ– can be tied to GND and EZS_SRQ+ driven
with a single-ended CMOS signal. See the Operation and
Applications Information section for more details.
STAT (Pin 49): Status Output. This signal is a configurable
logical OR combination of the UNLOCK, VCOOK, VCOOK,
LOCK, LOCK, REFOK, and REFOK status bits, program-
mable via the STATUS register. It can also be configured
to present a diode voltage for temperature measurement.
See the Operation section for more details.
SCLK (Pin 50): Serial Port Clock. This CMOS input clocks
serial port input data on its rising edge. See the Operation
section for more details.
PIN FUNCTIONS
SDO (Pin 51): Serial Port Data Output. This CMOS three-
state output presents data from the serial port during a
read communication burst. Optionally attach a resistor
of > 200kΩ to GND to prevent a floating output. See the
Operation section for more details.
SDI (Pin 52): Serial Port Data Input. The serial port uses
this CMOS input for data. See the Operation section for
more details.
GND (Exposed Pad Pin 53): Negative Power Supply
(Ground). The package exposed pad must be soldered
directly to the PCB land. The PCB land pattern should
have multiple thermal vias to the ground plane for both
low ground inductance and also low thermal resistance.



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