LTC6952 datasheet(74/80 Pages) AD

74 / 80 page

LTC6952

6952f

For more information www.analog.com

Preliminary Technical Data

Advance Product Information Subject to Change

Rev PrA

TYPICAL APPLICATIONS

1µF

61.9Ω

1µF

100Ω

33nF

22nF

48.7Ω

1.2µF

48.7Ω

0.1µF

75Ω

30Ω

0.1µF

0.47µF

1µF

100Ω

1µF

OUT0+

OUT0–

OUT1+

OUT1–

OUT2+

OUT2–

OUT10+

OUT10–

OUT3+

OUT3–

OUT4+

OUT4–

OUT5+

OUT5–

OUT6+

OUT6–

OUT7+

OUT7–

OUT8+

OUT8–

OUT9+

OUT9–

LTC6953

IN+

IN–

EZS_SRQ

–

Crystek

CCHD-575-25-100

100MHz Ref Osc

TO DAUGHTER

CARD #2

STAGE 1

STAGE 2

Crystek

CVCO55CC-

4000-4000

VCO+

VCO–

VTUNE

OUT0+

OUT0–

OUT1+

OUT1–

OUT2+

OUT2–

OUT10+

OUT10–

OUT3+

OUT3–

OUT4+

OUT4–

OUT5+

OUT5–

OUT6+

OUT6–

OUT7+

OUT7–

OUT8+

OUT8–

OUT9+

OUT9–

LTC6952

12.5MHz SYSREF

500MHz CLOCK

4GHz CLOCK

125MHz CLOCK

100MHz CLOCK

DAUGHTER CARD #1

DAUGHTER CARD #2

DAUGHTER CARD #3

DAUGHTER CARD #4

DAUGHTER CARD #5

100MHz REF CLK

SSRQ PASS THRU

TO DAUGHTER

CARD #3

TO DAUGHTER

CARD #4

TO DAUGHTER

CARD #5

REF+

REF-

EZS_SRQ+

EZS_SRQ–

Initial Setup: Program LTC6952 and LTC6953 registers settings created

from the LTC6952Wizard.

Step 1: Synchronize Stage 1 Reference Signals

A) EZSync: toggle Stage 1 LTC6953 SSRQ bit

B) OPT: Fine Alignment, adjust Stage 1 ADEL bits

Step 2: Synchronize Stage 2 Output Signals

A) Set Stage 1 LTC6953 SRQMD=1

B) ParallelSync, Toggle Stage 1 LTC6953 SSRQ bit

Step 3: Send SYSREF Request

A) Power Up LTC6952 SYSREF outputs

B) Set LTC6952 SRQMD=1

C) SEND SYSREF, Toggle Stage 1 LTC6953 SSRQ bit

Step 4: Optional Reduce Power

A) Power Down LTC6952 SYSREF outputs

B) Set Stage 1 LTC6953 & LTC6952 SRQMD=0

6952 TAO3

ParallelSync Multi-Chip Synchronization with Request Passthrough

LTC6952 Datasheet(PDF) 74 Page - Analog Devices

LTC6952 Datasheet(HTML) 74 Page - Analog Devices

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