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LTC6952 Datasheet(PDF) 5 Page - Analog Devices

Part # LTC6952
Description  Ultralow Jitter, 4.5GHz PLL with 11 Outputs and JESD204B Support
PDF  80 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC6952 Datasheet(HTML) 5 Page - Analog Devices

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LTC6952
5
6952f
For more information www.analog.com
Preliminary Technical Data
Advance Product Information Subject to Change
Rev PrA
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Reference Inputs (REF+, REF–)
fREF
Input Frequency
l
1
500
MHz
VREF
Input Signal Level
Single-Ended
l
0.5
2
2.7
VP-P
Minimum Input Slew Rate
20
V/µs
Input Duty Cycle
50
%
Self-bias Voltage
l
1.65
1.85
2.25
V
Minimum Input Signal Detected
(REFOK=1)
PDREFPK = 0, fREF = 10MHz,
Single-Ended Sine Wave
l
350
mVP-P
Maximum Input Signal Not Detected
(REFOK=0)
PDREFPK = 0, fREF = 10MHz,
Single-Ended Sine Wave
l
100
mVP-P
Input Resistance
Differential
l
2.6
4.2
6.1
kΩ
Input Capacitance
Differential
1.3
pF
VCO Input (VCO+, VCO–)
fVCO
Frequency Range
l
4500
MHz
Input Signal Level
RZ = 50Ω, Single-Ended
l
0.25
0.8
1.6
VP-P
l
–8
2
8
dBm
Self-Bias Voltage
2.05
V
Input Common Mode Voltage
800mVP-P Differential Input
l
1.6
2.7
V
Input Duty Cycle
50
%
Minimum Input Slew Rate
100
V/µs
Minimum Input Signal Detected
(VCOOK = 1)
PDVCOPK = 0, fVCO = 10MHz,
Single-Ended Sine Wave
l
350
mVP-P
Maximum Input Signal Not Detected
(VCOOK = 0)
PDVCOPK = 0, fVCO = 10MHz,
Single-Ended Sine Wave
l
100
mVP-P
Input Resistance
Single-Ended, Each Input
250
Ω
Input Capacitance
Single-Ended, Each Input
1.3
pF
CMOS SYNC/SYSREF Request Input (EZS_SRQ+ Only)
High-level Input Voltage
EZS_SRQ– tied to GND
l
1.3
V
Low-level Input Voltage
EZS_SRQ– tied to GND
l
0.6
V
Input Voltage Hysteresis
EZS_SRQ– tied to GND
200
mV
Input Current
EZS_SRQ– tied to GND
l
±1
µA
Differential SYNC/SYSREF Request Inputs (EZS_SRQ+ and EZS_SRQ–)
Input Signal Level
l
0.5
0.8
2.7
VP-P
Self-bias Voltage
l
1.8
2.1
2.4
V
Input Common Mode Voltage
800mVP-P Differential Input
1.5
3.0
V
Input Resistance
Differential
53
kΩ
Input Capacitance
Differential
1
pF
Phase/Frequency Detector (PFD)
fPFD
Input Frequency
l
167
MHz
Charge Pump
ICP
Output Current Range
20 Settings (see Table 6)
0.42
11.2
mA
Output Current Source/Sink Accuracy
All Settings, V(CP)= VCP+/2
±6
%
Output Current Source/Sink Matching
ICP = 420µA to 1.4mA, V(CP) = VCP+/2
±3
%
ICP = 1.68mA to 11.2mA, V(CP) = VCP+/2
±2
%
Output Current vs Output Voltage Sensitivity
(Note 7)
l
0.1
0.5
%/V
Output Current vs Temperature
V(CP) = VCP+/2
l
170
ppm/°C
The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C. VREF+ = VD+ = VVCO+ = VOUT+ = 3.3V, VCP+ = 5V unless otherwise
specified (Note 2). All voltages are with respect to GND.



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