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FS6500 Datasheet(PDF) 19 Page - NXP Semiconductors

Part # FS6500
Description  Safety power system basis chip with CAN FD and LIN transceivers
PDF  153 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS6500 Datasheet(HTML) 19 Page - NXP Semiconductors

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NXP Semiconductors
FS6500-FS4500-ASILD
Safety power system basis chip with CAN FD and LIN transceivers
TA = –40 °C to 125 °C, unless otherwise specified. VSUP = VSUP_UV_L to 36 V, unless otherwise specified. All voltages referenced to ground.
When 28 V < VSUP < 36 V, thermal dissipation must be considered (see Figure 32).
Symbol
Parameter
Min.
Typ.
Max.
Unit
Notes
Analog input - multi-purpose IOs
VIO_ANA_WD
Measurable input voltage (wide range)
3.0
—
19
V
VIO_ANA_TG
Measurable input voltage (tight range)
3.0
—
9.0
V
IIO_IN_ANA
Input current for IO_0 and IO_5
–5.0
—
100
µA
[7]
Output gate driver (IO_4)
VIO4_OH
High output level at IIO4_OUT = –2.0 mA
VPRE – 1.5
—
VPRE
V
VIO4_OL
Low output level at IIO4_OUT = +2.0 mA
0.0
—
1.0
V
VIO4_OUT_SK
VIO4_OUT_SC
Output current capability
2.0
—
—
—
—
–2.0
mA
Analog multiplexer
VAMUX_ACC
Voltage sense accuracy (VSNS, IO_0, IO_5) using 5.1 kΩ
resistor
–5.0
—
5.0
%
[8]
VAMUX_WD_5
Divider ratio (wide input voltage range) at VDDIO = 5.0 V
—
5.0
—
[9]
VAMUX_WD_3P3
Divider ratio (wide input voltage range) at VDDIO = 3.3 V
—
7.0
—
20[9]
VAMUX_TG_5
Divider ratio (tight input voltage range) at VDDIO = 5.0 V
—
2.0
—
VAMUX_TG_3P3
Divider ratio (tight input voltage range) at VDDIO = 3.3 V
—
3.0
—
VAMUX_REF1
Internal voltage Reference with 6.0 V < VSUP < 19 V
2.475
2.5
2.525
V
VAMUX_REF2
Internal voltage reference with VSUP ≤ 6.0 V, or VSUP ≥ 19 V
2.468
2.5
2.532
V
VAMUX_TP_CO
Internal temperature sensor coefficient
—
9.9
—
mV/°C
[5]
VAMUX_TP
Temperature sensor MUX_OUT output voltage (at TJ = 165 °C)
2.08
2.15
2.22
V
Interrupt
VINTB_OL
Low output level (IINT = 2.5 mA)
—
—
0.5
V
RPU_INT
Internal pull-up resistor (connected to VDDIO)
—
10
—
KΩ
IINT_LK
Input leakage current
—
—
1.0
µA
Digital interface
MISOH
High output level on MISO (IMISO = 1.5 mA)
VDDIO
– 0.4
—
—
V
MISOL
Low output level on MISO (IMISO = 2.0 mA)
—
—
0.4
V
IMISO
Tri-state leakage current (VDDIO = 5.0 V)
–5.0
—
5.0
µA
VDDIO
Supply voltage for MISO output buffer
3.0
—
5.5
V
IVDDIO
Current consumption on VDDIO
—
1.0
3.0
mA
SPILK
SCLK, NCS, MOSI input current
–1.0
—
1.0
µA
VSPI_IH
SCLK, NCS, MOSI high input threshold
2.0
—
—
V
VSPI_IL
SCLK, NCS, MOSI low input threshold
—
—
0.8
V
RSPI
NCS, MOSI internal pull-up (pull-up to VDDIO)
200
400
800
KΩ
Debug
VDEBUG_IL
Low input voltage threshold
2.1
2.35
2.8
V
VDEBUG_IH
High input voltage threshold
4.35
4.6
4.97
V
IDEBUG_LK
Input leakage current
–10
—
10
µA
Table 5. Static electrical characteristics ...continued
FS6500-FS4500-ASILD
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 8 — 5 August 2024
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