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FS6500 Datasheet(PDF) 94 Page - NXP Semiconductors

Part # FS6500
Description  Safety power system basis chip with CAN FD and LIN transceivers
PDF  153 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS6500 Datasheet(HTML) 94 Page - NXP Semiconductors

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NXP Semiconductors
FS6500-FS4500-ASILD
Safety power system basis chip with CAN FD and LIN transceivers
13.3.6 LONG_DURATION_TIMER
Write
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
MOSI
1
0
0
0
1
1
0
P
F2
F1
F0
REG_SE
0
MODE
LDT_
ENABLE
0
 
MISO
SPI_G
WU_G
CAN_G
LIN_G
IO_G
VPRE
_G
VCORE
_G
VOTHERS_
G
F2
F1
F0
REG_SE
LDT_
RUNNING
MODE
LDT_
ENABLE
LDT_INT
Table 32. LONG_DURATION_TIMER register description
Read
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
MOSI
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
 
MISO
SPI_G
WU_G
CAN_G
LIN_G
IO_G
VPRE
_G
VCORE
_G
VOTHERS_
G
F2
F1
F0
REG_SE
LDT_
RUNNING
MODE
LDT_
ENABLE
LDT_INT
Description
Select timer operating function
000
Function 1: in normal mode count and generate flag or INT when
counter reaches the after run value.
001
Function 2: in normal mode count until after run value is reached, then enters
in LPOFF.
010
Function 3: in normal mode count until after run value is reached, then enters
in LPOFF. Once in LPOFF, count until wake-up value is reached and wake-
up.
011
Function 4: in LPOFF, count until wake-up value is reached and wake-up.
100
Function 5: in LPOFF, count and do not wake-up. Counter value is stored in
wake-up register.
101... 111
N/A
F2:F0
Reset condition Power on reset
Description
Counter register selection
0
Read programmed wake-up register
1
Read real time counter into wake-up register (after counter is stopped with
LDT_ENABLE bit)
REG_SE
Reset condition Power on reset
Description
Operating mode selection
0
Calibration mode (488 µs resolution)
1
Normal mode (1 s resolution)
MODE
Reset condition Power on reset
Description
LDT counter control
0
LDT counter stop
1
LDT counter start
LDT_ENABLE
Reset condition Power on reset
Table 33. LONG_DURATION_TIMER description and configuration of the bits (default value in bold)
FS6500-FS4500-ASILD
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 8 — 5 August 2024
Document feedback
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