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FS6500 Datasheet(PDF) 33 Page - NXP Semiconductors |
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FS6500 Datasheet(HTML) 33 Page - NXP Semiconductors |
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33 / 153 page ![]() NXP Semiconductors FS6500-FS4500-ASILD Safety power system basis chip with CAN FD and LIN transceivers aaa-037743 Internal IO_4 signal latched Error signal (IO_4 input) Acknowledgment counter Acknowledgement signal from MCU (IO_5 input) Filter time Reset counter Restart Acknowledgment counter FS0B RSTB The error is acknowledged by the MCU then, internal IO_4 signal is released The error is NOT acknowledged by the MCU. FS0B is activated at the end of the counter. Figure 14. External error signal handling 11.15 SAFE output pins (FS0B, FS1B, RSTB) 11.15.1 FS0B pin FS0B pin is the primary safe output pin. FS0B is asserted low when a fault event occurs (see Section 12.5.5). The objective of this pin is to drive an electrical safe circuitry independent from MCU to deactivate the whole system and set the ECU in a protected and known state. After each power-on reset or after each wake-up event (LPOFF), the FS0B pin is asserted low. The MCU can decide to release the FS0B pin, when the application is ready to start. An external pull-up circuitry is mandatory connected to VDDIO or VSUP3. • If the pull-up is connected to VDDIO, the value recommended is 5.0 kΩ, there is no current in LPOFF since VDDIO is off in LPOFF mode. • If the pull-up is connected to VSUP3, the value must be above 10 kΩ, there is a current in the pull-up resistor to consider at application level in LPOFF mode. 11.15.2 FS1B pin FS1B pin is the secondary safe output pin. FS1B is asserted low with a configurable delay (tDELAY) or duration (tDUR) when FS0B is asserted low (see Section 12.5.6). This pin can be used to: • Open the phases of a motor after a configurable delay starting when FS0B is asserted, to demagnetize the motor coils and reduce the inductive effect when the switch is open. • Disable an external physical layer during a configurable duration starting when FS0B is asserted, to avoid miscommunication when the module is in fail mode. • Be a redundant safe output pin to FS0B when tDELAY = 0. In this case, FS1B is asserted at the same time than FS0B. • Any other use case where a second safety pin is needed. FS6500-FS4500-ASILD All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 8 — 5 August 2024 Document feedback 33 / 153 |
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