FS6500 datasheet(9/153 Pages) NXP

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NXP Semiconductors

FS6500-FS4500-ASILD

Safety power system basis chip with CAN FD and LIN transceivers

7.2 Pin description

A functional description of each pin can be found in Section 11.

number

Pin name

Type

Definition

VSUP1

A_IN

Power supply of the device. An external reverse battery protection diode in series is

mandatory

VSUP2

A_IN

Second power supply. Protected by the external reverse battery protection diode

used for VSUP1. VSUP1 and VSUP2 must be connected together externally.

VSENSE

A_IN

Sensing of the battery voltage. Must be connected prior to the reverse battery

protection diode.

VSUP3

A_IN

Third power supply dedicated to the device supply. Protected by the external

reverse battery protection diode used for VSUP1. Must be connected between the

reverse protection diode and the input PI filter.

LIN

A_IN/OUT

LIN single-wire bus transmitter and receiver.

or FS1B

D_OUT

Second output of the safety block (active low). The pin is asserted low at start-up

and when a fault condition is detected, with a configurable delay or duration versus

FS0B output terminal. Open drain structure.

LIN and FS1B functions are exclusive. The differentiation is made by part numbers. When LIN is available, FS1B

is not, and vice versa. If neither LIN, nor FS1B functions are used, this pin must be left open.

GND_COM GROUND

Dedicated ground for physical layers

CAN_5V

A_OUT

Output voltage for the embedded CAN FD interface

CANH

A_IN/OUT

CAN output high. If CAN function is not used, this pin must be left open.

CANL

A_IN/OUT

CAN output low. If CAN function is not used, this pin must be left open.

IO_4

D_IN

A_OUT

Can be used as digital input (load dump proof) with wake-up capability or as an

output gate driver

Digital input: Pin status can be read through the SPI. Can be used to monitor error

signals from another IC for safety purposes (when used with IO_5).

Wake-up capability: Can be selectable to wake-up on edges or levels.

Output gate driver: Can drive a logic level low-side NMOS transistor. Controlled by

the SPI.

IO_5/VKAM A_IN

D_IN

A_OUT

Can be used as digital input with wake-up capability or as an analog output

providing keep alive memory supply in low-power mode.

Analog input: Pin status can be read through the MUX output terminal

Digital input: Pin status can be read through the SPI. Can be used to monitor error

signals from another IC for safety purposes (when used with IO_4).

Wake-up capability: Can be selectable to wake-up on edges or levels.

Supply output: Provide keep alive memory supply in low-power mode

VKAM can be enabled or disabled by default at power up. The differentiation is made by part numbers.

IO_0

A_IN

D_IN

Can be used as analog or digital input (load dump proof) with wake-up capability

(selectable)

Analog input: Pin status can be read through the MUX output terminal

Digital input: Pin status can be read through the SPI.

Wake-up capability: Can be selectable to wake-up on edges or levels.

FCRBM

A_IN

Feedback core resistor bridge monitoring: For safety purposes, this pin is used to

monitor the middle point of a redundant resistor bridge connected on VCORE (in

Table 3. FS6500/FS4500 pin definition

FS6500-FS4500-ASILD

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 8 — 5 August 2024

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