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FS6500 Datasheet(PDF) 89 Page - NXP Semiconductors

Part # FS6500
Description  Safety power system basis chip with CAN FD and LIN transceivers
PDF  153 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS6500 Datasheet(HTML) 89 Page - NXP Semiconductors

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NXP Semiconductors
FS6500-FS4500-ASILD
Safety power system basis chip with CAN FD and LIN transceivers
Description
CAN_5V overvoltage monitoring
0
Off. VCAN OV is not monitored. Flag is ignored.
1
On. VCAN OV is monitored. If OV the CAN_5V regulator is switched off.
VCAN_OV_MON
Reset condition Power on reset
Description
Configure the current limitation duration before VAUX is switched off.
0
10 ms
1
50 ms
TAUX_LIM_OFF
Reset condition Power on reset
Description
Configure VAUX regulator as a tracker of VCCA
0
NO tracking.
1
Tracking mode enabled and latched
VAUX_TRK_EN
Reset condition Power on reset
Description
Report a battery disconnection (POR of the main logic)
0
NO POR
1
POR occurred
Reset condition Power on reset
BAT_FAIL[1]
Clear condition
Read
Table 23. INIT_VREG description and configuration of the bits (default value in bold) ...continued
[1]
BAT_FAIL = POR_M or VSUP_UV_L or BG_OK (reset sources of main logic). BAT_FAIL bit is cleared by a SPI read.
13.3.2 INIT_WU1
Write
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
MOSI
1
0
0
0
0
1
0
P
WU_
IO0_1
WU_
IO0_0
WU_
IO2_1
WU_
IO2_0
WU_
IO3_1
WU_
IO3_0
WU_
IO4_1
WU_
IO4_0
 
MISO
SPI_G
WU_G
CAN_G
LIN_G
IO_G
VPRE
_G
VCORE
_G
VOTHERS_
G
WU_
IO0_1
WU_
IO0_0
WU_
IO2_1
WU_
IO2_0
WU_
IO3_1
WU_
IO3_0
WU_
IO4_1
WU_
IO4_0
Table 24. INIT_WU1 register description
Read
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
MOSI
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
 
MISO
SPI_G
WU_G
CAN_G
LIN_G
IO_G
VPRE
_G
VCORE
_G
VOTHERS_
G
WU_
IO0_1
WU_
IO0_0
WU_
IO2_1
WU_
IO2_0
WU_
IO3_1
WU_
IO3_0
WU_
IO4_1
WU_
IO4_0
Description
IO_0 wake-up configuration
00
NO wake-up capability
01
Wake-up on rising edge - or high level
10
Wake-up on falling edge - or low level
11
Wake-up on any edge
WU_IO0_1:0
Reset condition Power on reset
Table 25. INIT_WU1 description and configuration of the bits (default value in bold)
FS6500-FS4500-ASILD
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 8 — 5 August 2024
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