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FS6500 Datasheet(PDF) 91 Page - NXP Semiconductors

Part # FS6500
Description  Safety power system basis chip with CAN FD and LIN transceivers
PDF  153 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS6500 Datasheet(HTML) 91 Page - NXP Semiconductors

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NXP Semiconductors
FS6500-FS4500-ASILD
Safety power system basis chip with CAN FD and LIN transceivers
Description
IO_5 wake-up configuration
00
NO wake-up capability
01
Wake-up on rising edge - or high level
10
Wake-up on falling edge - or low level
11
Wake-up on any edge
WU_IO5_1:0
Reset condition Power on reset
Description
Define CAN behavior when FS1B is asserted low
0
CAN in RX only mode (when FS1B_CAN_ IMPACT = 1 in INIT_FAULT
register)
1
CAN in sleep mode (when FS1B_CAN_ IMPACT = 1 in INIT_FAULT register)
CAN_DIS_CFG
Reset condition Power on reset
Description
Define the CAN wake-up timeout
0
120 µs
1
2.8 ms
CAN_WU_TO
Reset condition Power on reset
Description
To comply with J2602 standard. Recessive mode when VSUP < 7.0 V
0
Compliant with J2602 standard
1
Not compliant with J2602 standard
LIN_J2602_dis
Reset condition Power on reset
Description
Configure the LIN slew rate
00
20 kbit/s
01
10 kbit/s
1X
Fast baud rate (Max: 100 kbit/s)
LIN_SR_1:0
Reset condition Power on reset
Table 27. INIT_WU2 description and configuration of the bits (default value in bold)
13.3.4 INIT_INT
Write
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
MOSI
1
0
0
0
1
0
0
P
INT_
DURATION
INT_INH_
LIN
INT_INH_
ALL
INT_INH_
VSNS
INT_INH_
VPRE
INT_INH_
VCORE
INT_INH_
VOTHER
INT_INH_
CAN
 
MISO
SPI_G
WU_G
CAN_G
LIN_G
IO_G
VPRE
_G
VCORE
_G
VOTHERS_
G
INT_
DURATION
INT_INH_
LIN
INT_INH_
ALL
INT_INH_
VSNS
INT_INH_
VPRE
INT_INH_
VCORE
INT_INH_
VOTHER
INT_INH_
CAN
Table 28. INIT_INT register description
Read
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
MOSI
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
 
FS6500-FS4500-ASILD
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 8 — 5 August 2024
Document feedback
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