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Table 7-5. Default Output Voltage Setpoints (continued)

VSEL PIN(1)

DEVICE NUMBER

VSET[7:0]

OUTPUT VOLTAGE SETPOINT

Short Circuit to GND

All

0x46

750mV

Short Circuit to VIN

All

0x5F

875mV

47 kΩ to VIN

TPS6287xZ0

0x50

800mV

TPS6287xZ1

0x64

900mV

TPS6287xZ2

0x82

1050mV

TPS6287xZ4

0x78

1000mV

TPS6287xZ5

0x00

400mV

(1)

For a reliable voltage setting, make sure there is no stray current path connected to the VSEL pin and that the parasitic capacitance

between the VSEL pin and GND is less than 100pF.

If the user programs new output voltage setpoint (VSET[7:0]), output voltage range (VRANGE[1:0]), or soft-start

time (SSTIME[1:0]) settings when the device has already begun the soft-start sequence, the device ignores the

new values until the soft-start sequence is complete. If the user changes the value of VSET[7:0] during soft start,

the device first ramps to the value that VSET[7:0] had when the soft-start sequence began. Then, when soft start

is complete, ramps up or down to the new value.

If the user changes VSET[7:0], VRAMP[1:0], or SSTIME[1:0] while EN is low, the device uses the new values the

next time the user enables the device.

During start-up, the output voltage ramps up to the target value set by the VSEL pin before ramping up or down

to any new value programmed to the device over the I2C interface.

7.3.6.3 Non-Default Output Voltage Setpoint

If none of the default voltage range or voltage setpoint combinations are suitable for the application, the user can

change these device settings through I2C before the user enables the device. Then, when the user pulls the EN

pin high, the device starts up with the desired start-up voltage.

Note that if the user changes the device settings through I2C while the device is ramping, the device ignores the

changes until the ramp is complete.

7.3.6.4 Dynamic Voltage Scaling

If the user changes the output voltage setpoint while the DC/DC converter is operating, the device ramps up or

down to the new voltage setting in a controlled way.

The VRAMP[1:0] bits in the CONTROL1 register sets the slew rate when the device ramps from one voltage to

another during DVS (see Table 7-6).

Table 7-6. Dynamic Voltage Scaling Slew Rate

VRAMP[1:0]

DVS Slew Rate

0b00

10mV/μs (0.5μs/step)

0b01

5mV/μs (1μs/step)

0b10

1.25mV/μs (5μs/step)

0b11

0.5mV/μs (10μs/step)

Note that ramping the output to a higher voltage requires additional output current, so that during DVS, the

converter must generate a total output current given by:

IOUT=IOUTDC +COUTdVOUTdt

(4)

where

• IOUT is the total current the converter must generate while ramping to a higher voltage.

TPS62870, TPS62871, TPS62872, TPS62873

SLVSGC5E – JANUARY 2023 – REVISED OCTOBER 2025

www.ti.com

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