TPS62870 datasheet(6/66 Pages) TI2

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5 Pin Configuration and Functions

VIN

Not to scale

SDA

MODE/SYNC

VIN

SCL

GND

VOSNS

GOSNS

COMP

Thermal

Pad

Figure 5-1. 16-Pin RXS VQFN Package (Top View)

Table 5-1. Pin Functions

TYPE(1)

DESCRIPTION

NAME

NO.

COMP

—

Device compensation input. A resistor and capacitor from this pin to GOSNS define the

compensation of the control loop.

In stacked operation, connect the COMP pins of all stacked devices together and connect a

resistor and capacitor between the common COMP node and GOSNS.

GOSNS

Output ground sense (differential output voltage sensing)

VOSNS

Output voltage sense (differential output voltage sensing)

This is the enable pin of the device. The user must connect to this pin using a series resistor of

at least 15kΩ. A low logic level on this pin disables the device and a high logic level on this pin

enables the device. Do not leave this pin unconnected.

For stacked operation, interconnect EN pins of all stacked devices with a resistor to the supply

voltage or a GPIO of a processor. See Section 7.3.17 for a detailed description.

VIN

5, 9

Power supply input. Connect an input capacitor as close as possible between each VIN and GND

(on both sides of the package)

GND

6, 8

GND

Ground pin

This pin is the switch pin of the converter and is connected to the internal power MOSFETs.

I/O

Open-drain power-good output. Low impedance when not "power good," high impedance when

"power good." This pin can be left open or be tied to GND when not used in single device

operation.

In stacked operation, interconnect the PG pins of all stacked devices. Only the PG pin of the

primary converter in stacked operation is an open-drain output. For devices that are defined as

secondary converters in stacked mode, this pin is an input pin. See Section 7.3.17 for a detailed

description.

MODE/SYNC

The device runs in power save mode when this pin is pulled low. If the pin is pulled high, the

device runs in forced-PWM mode. Do not leave this pin unconnected. The mode pin can also be

used to synchronize the device to an external clock.

SDA

I/O

I2C serial data pin. Do not leave floating. Connect a pullup resistor to a logic high level.

Connect to GND for secondary devices in stacked operation and for device variants without I2C.

SCL

I2C serial clock pin. Do not leave this pin floating. Connect a pullup resistor to a logic high level.

Connect this pin to GND for secondary devices in stacked operation and for device variants

without I2C.

TPS62870, TPS62871, TPS62872, TPS62873

SLVSGC5E – JANUARY 2023 – REVISED OCTOBER 2025

www.ti.com

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