| Electronic Components Datasheet Search |
|
TPS62870 Datasheet(PDF) 27 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
TPS62870 Datasheet(HTML) 27 Page - Texas Instruments |
|
27 / 66 page ![]() 7.3.13.2 Hiccup Mode To enable hiccup operation, make sure that HICCUPEN = 1 in the CONTROL1 register. If hiccup operation is enabled and the high-side switch current exceeds the current limit threshold on 32 consecutive switching cycles, the device: • Stops switching for 128µs, after which the device automatically starts switching again (the device starts a new soft-start sequence). • Sets the HICCUP bit in the STATUS register. • Pulls the PG pin low. The PG pin stays low until the overload condition goes away and the device can start up correctly and regulate the output voltage. Note that power-good function has a deglitch circuit, which delays the rising edge of the power-good signal by 40µs (typical). Hiccup operation continues in a repeating sequence of 32 cycles in current limit, followed by a pause of 128µs, followed by a soft-start attempt for as long as the output overload condition exists. The device clears the HICCUP bit if the user reads the STATUS register when the overload condition has been removed. 7.3.13.3 Current Limit Mode To enable current limit mode, make sure that HICCUPEN = 0 in the CONTROL1 register. When current limit operation is enabled, the device limits the high-side switch current cycle-by-cycle for as long as the overload condition exists. If the device limits the high-side switch current for four or more consecutive switching cycles, the device sets ILIM = 1 in the STATUS register. The device clears the ILIM bit if the user reads the STATUS register when the overload condition no longer exits. 7.3.14 Power Good (PG) The power-good (PG) pin is bidirectional and has two functions: • In a standalone configuration and in the primary device of a stacked configuration, the PG pin is an open- drain output that indicates the status of the converter or stack. • In a secondary device of a stacked configuration, the PG pin is an input that indicates when the soft-start sequence is complete and all converters in the stack can change from DCM switching to CCM switching. VOUT VT-(UVP) VT+(UVP) PG UVP VT-(OVP) VT+(OVP) OVP td(PG) td(PG) td(PG) td(PG) td(PG) td(PG) Figure 7-12. PG Timing 7.3.14.1 Standalone or Primary Device Behavior The primary purpose of the PG pin is to indicate if the output voltage is in regulation, but the PG pin also indicates if the device is in thermal shutdown or disabled. Table 7-7 summarizes the behavior of the PG pin in a standalone or primary device. www.ti.com TPS62870, TPS62871, TPS62872, TPS62873 SLVSGC5E – JANUARY 2023 – REVISED OCTOBER 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 27 Product Folder Links: TPS62870 TPS62871 TPS62872 TPS62873 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |